Basic block oriented trace cache utilizing a basic block sequence buffer to indicate program order of cached basic blocks

A method of operating a cache within a microprocessor comprising:

• receiving instruction bytes corresponding to a fetch address;
• decoding said instruction bytes into instructions;
• forming basic blocks of instructions by:
• grouping the instructions into basic blocks that end with branch instructions;
• padding the basic blocks with NULL instructions if the basic blocks have less than a predetermined number of instructions;
• dividing the basic blocks into two or more basic blocks if the basic blocks have more than the predetermined number of instructions;
• storing the basic blocks into a basic block cache;
• and
• storing pointers to the basic blocks into a basic block sequence buffer.

A computer system configured to cache basic blocks of instructions comprising:

• a microprocessor having
• a basic block cache configured to store basic blocks of instructions, wherein each basic block comprises a variable number of instructions and ends with a branch instruction, wherein said basic block cache is configured to divide basic blocks greater a predetermined maximum length into two or more separate smaller basic blocks, and
• a basic block sequence buffer comprising a plurality of storage locations, wherein each storage location is configured to store a block sequence entry comprising an address tag and one or more basic block pointers, wherein said address tag corresponds to the fetch address of a particular basic block, and wherein said pointers point to basic blocks that follow said particular basic block in program order;
• a CPU bus coupled to said microprocessor;
• and
• a modem coupled to said CPU bus via a bus bridge.