US 6,185,670 B2 · System for reducing number of opcodes required in a processor using an instruction format including operation class code and operation selector code fields

Abstract

A method and apparatus for reducing the number of opcodes required in a computer architecture using an operation class code and an operation selector code. A processor contains a fetch unit which fetches instructions to be executed by the processor. An instruction may conform to an instruction format which includes a number of fields that specify an operation class code, an operation selector code, and one or more operands. The processor also contains a decoder which uses the operation class code to generate a single execution flow that is capable of executing a class of similar operations. The single execution flow, in the form of execution control information, is sent to an execution unit along with the associated operands. The operation selector code is also passed to the execution unit. The execution unit performs the specific operation identified by the operation selector code and execution control information.

Claims21

Dependent claims

A processor comprising:

a fetch unit to receive an instruction format, said instruction format including an operation class code field to store an operation class code that identifies a plurality of similar operations, a first operand field to store a first operand descriptor that identifies a first operand, and an operation selector code field to store an operation selector code descriptor that identifies an operation selector code that specifies one of said plurality of similar operations;
a decoder, coupled to said fetch unit, to generate a single execution flow for said plurality of similar operations responsive to the data in said operation class code field;
and
an execution unit, coupled to said decoder and coupled to receive said operation selector code, to execute one of said plurality of similar operations on said first operand using said single execution flow and said operation selector code.

1 more element

Dependencies are inferred from the claim text.

System for reducing number of opcodes required in a processor using an instruction format including operation class code and operation selector code fields

Life of this patent

System for reducing number of opcodes required in a processor using an instruction format including operation class code and operation selector code fields

Life of this patent

Abstract

Claims21