Minimal frame buffer manager allowing simultaneous read/write access by alternately filling and emptying a first and second buffer one packet at a time

A method for transferring a block of data from a storage medium to an external device, the method comprising the steps of:

• 1) generating a streaming digital signal by sensing data recorded on a storage medium;
• 2) dividing the streaming digital signal into a plurality of packets;
• 3) using a single integrated circuit including a minimal frame buffer manager for transferring no more than one packet of the digital data at a time and data pointer logic, to:
• a) store a first packet in a first buffer in the integrated circuit during a first time window;
• b) store a subsequently generated second packet in a second buffer in the integrated circuit during a second time window;
• c) retrieve the first packet from the first buffer during the second time window;
• and
• 4) providing the first packet to an external device during the second time window, wherein the second time window begins immediately after the first time window ends.

A method for use in a single integrated circuit in including providing a minimal frame buffer manager for transferring no more than one packet of digital data at a time and data pointer logic, that is configured to support a read operation within a storage device that generates a stream of data destined for an external device, the method further comprising the steps of:

• 1) storing portions of a stream of digital data to a first buffer;
• 2) storing subsequent portions of the stream of digital data to a second buffer, while also transferring the contents of the first buffer to an external device;
• 3) storing further subsequent portions of the stream of digital data to the first buffer, while also transferring the contents of the second buffer to the external device;
• and
• 4) repeating steps 1 through 4 until the stream of digital data stops.

A single integrated decoder circuit, including providing a minimal frame buffer manager for transferring no more than one packet of digital data at a time, for use in a storage device, the decoder circuit further comprising:

• an input interface circuit operatively configured to connect to, and receive incoming digital data from, a first external source;
• an output interface circuit operatively configured to connect to, and transfer outgoing digital to, a second external source;
• memory having an identifiable first buffer and an identifiable second buffer, wherein the memory is arrange to allow simultaneous read/write access to the first buffer and the second buffer;
• and
• logic coupled to the input interface circuit, the output interface circuit and the memory, the logic being arranged to conduct simultaneous read/write access to the first buffer and the second buffer for storing portions of incoming digital data to the second buffer while generating the outgoing digital data by transferring the contents of the first buffer to the output interface circuit, and subsequently storing further subsequent portions of the incoming digital data to the first buffer while generating the outgoing digital data by transferring the contents of the second buffer to the output interface circuit.