US 6,185,639 B2Granted

System and method to reduce a computer system's interrupt processing overhead

AssigneeInternational Business Machines Corporation

InventorsKailash Kailash, Balakrishna B. Bayar, Vytla P. Chandramouli, Sanjeev B. Gokhale

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Abstract

The invention provides structure and method to control the presentation of interrupts to a computer system by delaying communication of the interrupts to the host computer or processor according to predetermined rules. In particular, the method of the invention first detects the occurrence of an I/O interrupt related to a device. Next, the method reserves notification to the host processor of the I/O interrupt for a period of time based on a set of predetermined rules. Finally, the method notifies the host processor of substantially all I/O interrupts for which notification has been reserved during the period of time at expiration of the period of time, whereby the reserve notification lowers the overhead to the host processor in handling the I/O interrupts.

Claims24

Dependent claims

In a computer system having a host processor and a first plurality of peripheral devices coupled to said host processor by a second plurality of peripheral device controllers, one of said peripheral device controllers identified as a master controller, a method for reducing, over a predetermined amount of time, the number of system interrupts to said host processor comprising:

for each said peripheral device controller;
receiving a request for interrupt;
determining if said device controller is enabled to delay processing of said requested interrupt and:
(i) if said device controller is enabled to delay processing of said requested interrupt then processing said interrupt with delay, said processing with delay including a step of posting data and status transfer completion;
and
(ii) if said device controller is not enabled to process said requested interrupt with delay, then processing said interrupt without delay;
and,
determining if said device controller is enabled to post completion of the interrupt request, and:
(iii) if said device controller is enabled to post completion of the interrupt request, then posting data and status transfer completion to said host processor;
and
(iv) if said device controller is not enabled to post completion of the interrupt request, then posting completion of the interrupt request in conventional manner.

8 more elements

Dependencies are inferred from the claim text.