Address triggered DMA controller with an indicative signal including circuitry for calculating a new trigger address value based on the sum of the current trigger address and the descriptor register data with a trigger address register

An address triggered DMA controller, comprising:

• a DMA engine for controlling transfer of data between an external device and locations in a memory designated by respective addresses and comprising a source address register, for storing data representing a current one of the respective addresses;
• and
• a DMA monitor for monitoring the respective addresses, and if the current one of the respective addresses matches a predetermined value, generating a signal to indicate a match, and comprising:
• a trigger address register for storing the predetermined value;
• a comparator coupled to the trigger address register and the source address register for generating the match indicative signal;
• a descriptor register, for storing data indicating a predetermined amount of data;
• and
• calculating circuitry for storing a value in the trigger address register having the value of the sum of the descriptor register data and the trigger address register value and comprising:
• circuitry for calculating a new trigger address value having the value of the sum of the current value of the trigger address register and the descriptor register data, and
• circuitry for storing the new trigger address value in the trigger address register when the match indicative signal is generated.