Method and system for logic design constraint generation
AssigneeSun Microsystems, Inc.
InventorLiang T. Chen
Life of this patent
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Abstract
A system and method for generating design constraints for a logic synthesized block from timing analysis of the block. A timing analysis of logic described in software is performed for each of various operating modes of a circuit in which the logic is used. Timing data is extracted from the timing analysis and used as design constraints in the synthesis of the logic for the block.
Claims27
A method for generating design constraints for synthesis of a logic block comprising the steps of:
- simulating operation of the logic block for a plurality of operating modes;
- storing timing data for the operating modes;
- and
- deriving design constraints from the stored timing data.
A system for generating design constraints for synthesis of a logic block comprising:
- a processor configured to simulate the operation of the logic block for a plurality of operating modes;
- and
- a memory configured to store timing data for the operating modes;
- wherein the processor is configured to derive design constraints from the stored timing data.
A method for generating design constraints for synthesis of a logic block comprising the steps of:
- simulating the operation of the logic block for a plurality of operating modes;
- for each operating mode, storing signal arrival times for at least one input boundary pin and signal departure times for at least one output boundary pin of the logic block;
- selecting the latest signal arrival time for the input boundary pins;
- and
- selecting the earliest signal departure time for the output boundary pins.
A computer-readable medium containing instructions for controlling a system to perform a method comprising the steps of:
- simulating operation of the logic block for a plurality of operating modes;
- storing timing data for the operating modes;
- and
- deriving design constraints from the stored timing data.
Dependencies are inferred from the claim text.