Radio communication device using quadrature modulation-demodulation circuit

A signal processing method of a radio communication device using a quadrature modulation-demodulation circuit comprising the steps of:

• outputting a base band signal perpendicularly intersecting with a QPSK signal inputted thereto by means of a quadrature demodulation circuit;
• inputting a transmission data to convert into two analog base band signals, before outputting them by means of a base band signal generation circuit;
• inputting both of said analog base band signal and a modulated frequency signal, thus outputting said QPSK signal by means of a quadrature modulation circuit;
• inputting thereto both of said analog base band signal and said QPSK signal, thus selecting either one of two signals to output by means of a switching circuit;
• inputting thereto an output signal of said switching circuit, thus quantizing said output signal to output by means of an A/D conversion circuit;
• inputting thereto an output signal of said A/D conversion circuit to detect a DC offset error by means of offset error detecting means;
• and
• correcting DC offset error involved in said analog base band signal and said QPSK signal by means of a DC offset error adjusting circuit,
• wherein when said analog base band signal is selected in said switching circuit, it causes said DC offset error to be corrected.

A signal processing method of a radio communication device using a quadrature modulation-demodulation circuit comprising the step of:

• causing two-kind of data “in-phase” and “quadrature” to be quantized with sampling cycle T by means of A/D conversion circuit;
• causing an average value of said A/D conversion circuit to be obtained while being integrated during time period of N times of said sampling cycle T which time period is sufficiently long time period than each reception (transmission) base band signal cycle τ, thus average value is obtained in an integrating and averaging processing step;
• enabling the DC offset errors corresponding to several LSBs to be obtained, since if there is no DC offset error in the base band signal, and to be a randomized reception (transmission) base band signal and as long as it continues to be integrated during sufficiently longer time than the cycle, and a result of the above integrating and averaging processing step denotes 0 (zero);
• inputting the output of the integrating and averaging processing step to a switching switch state flag detecting processing step;
• causing an RX address bit to be a DC offset error information of the reception base band signal to be supplemented to append when detecting a selection state of an RX base band signal, in the switching switch state flag detecting processing step;
• and
• causing a TX address bit to be a DC offset error information of the transmission base band signal to be supplemented to append ID in the output processing circuit, while when detecting a selection state of a TX base band signal, regardless of reception/transmission.