Integrated twisted pair filter with a secure RIC function

A repeater interface controller, receiving as input signals a link signal, a random signal, and a data signal, said repeater interface controller comprising:

• a first filter for said link signal;
• a second filter for said data signal;
• a third filter for said random signal;
• and
• a transmit port comprising:
• a buffer driver coupled to an external interconnect;
• and
• an analog multiplexer, coupled to said buffer driver and receiving from said first, second and third filters said link, random and data signals, said analog multiplexer selecting one of said filtered link signal, said filtered random signal, and said filtered data signals to said buffer driver for output to said external interconnect.

A circuit comprising:

• a data generation circuit providing a plurality of link, random and data signals for transmission in a plurality of repeater channels, each channel capable of transmitting one or more of a link signal, a random signal and a data signal;
• a filter bank coupled to said data generation circuit, said filter bank filtering said link, random and data signals;
• and
• a plurality of transmit ports coupled to said filter bank for receiving said filtered link, random and data signals, each transmit port receiving a link signal, a random signal and a data signal of one of said repeater channels and being selectably enabled to transmit said link signal, said random signal, and data signal selectively onto an external interconnect.

An integrated circuit repeater interface controller comprising:

• a data generation circuit including a link generator and providing a plurality of link and data signals for transmission in a plurality of repeater channels, each channel transmitting a link signal and a data signal, wherein said link generator is capable of providing a link pulse between packets of transmitted data, said link generator providing said link pulse outside of a window of time preceding the start of each said packet and outside a window of time following the end of said packet;
• a filter bank coupled to said data generation circuit, said filter bank filtering a selected pair of said link and data signals;
• and
• a plurality of transmit ports coupled to said filter bank for receiving said filtered link, random and data signals, each transmit port receiving a link signal, a random signal, and a data signal of one of said repeater channel and being selectably enabled to transmit one of said link, random and data signals onto an external interconnect.

A method for providing a repeater interface controller, said repeater interface controller receiving a link signal, a random signal and a data signal, said method comprising:

• filtering said link signal;
• filtering said data signal;
• filtering said random signal;
• providing said filtered link signal, said filtered random signal, and said filtered data signal to a transmit port, said transmit port comprising a buffer driver coupled to an external interconnect;
• and
• outputting selectively said link signal, said random signal and said data signals onto said external interconnect, said transmit port selecting, when authorized, said filtered data signal for output when a voltage of said filtered link signal is substantially equal to a voltage of said filtered data signal.

A repeater receiving a link signal, a random signal and a data signal, comprising:

• a first filter for filtering said link signal;
• a second filter for filtering said data signal;
• a random signal;
• a transmit port comprising a buffer driver coupled to an external interconnect;
• and
• an analog multiplexer receiving said filtered link signal, said filtered random signal, and said filtered data signal for selectively providing said filtered link signal, said random signal, and said filtered data signal to said transmit port for output, said analog multiplexer, when authorized, selecting said filtered data signal when a voltage of said filtered link signal is substantially equal to a voltage of said filtered data signal.