Reverse-link de-interleaving for communication systems based on closed-form expressions
AssigneeLucent Technologies Inc.
InventorMohit K. Prasad
Life of this patent
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Abstract
De-interleaving of reverse-link channels is performed by implementing closed-form expressions that are equivalent to the table-based processing specified in the cdmaOne telecommunication specification. The implementation can be in either hardware or software or a combination of both For each cdmaOne reverse-link channel, the closed-form expression relates each interleaved symbol position to a corresponding de-interleaved symbol position, which is used to generate a de-interleaved symbol stream from the interleaved symbol stream. In one hardware implementation, the reverse-link de-interleaver of the present invention has an address generation unit made from two modulo counters and five muxes.
Claims27
A method for de-interleaving a reverse-link channel of a communication system, comprising the steps of:
- (a) receiving an interleaved symbol stream for the reverse-link channel;
- (b) implementing a closed-form expression relating each interleaved symbol position to a corresponding de-interleaved symbol position to generate a de-interleaved symbol position for each symbol in the interleaved symbol stream, wherein the closed-form expression corresponds to two or more different sets of mathematical operations being applied to bits in a binary value representing each interleaved symbol position to generate bits in a binary value representing a corresponding de-interleaved symbol position;
- and
- (c) generating a de-interleaved symbol stream from the interleaved symbol stream using the de-interleaved symbol positions.
A de-interleaver for de-interleaving a reverse-link channel of a communication system, comprising:
- (a) means for receiving an interleaved symbol stream for the reverse-link channel;
- (b) means for implementing a closed-form expression relating each interleaved symbol position to a corresponding de-interleaved symbol position to generate a de-interleaved symbol position for each symbol in the interleaved symbol stream, wherein the closed-form expression corresponds to two or more different sets of mathematical operations being applied to bits in a binary value representing each interleaved symbol position to generate bits in a binary value representing a corresponding de-interleaved symbol position;
- and
- (c) means for generating a de-interleaved symbol stream from the interleaved symbol stream using the de-interleaved symbol positions.
An integrated circuit having a de-interleaver for de-interleaving a reverse-link channel of a communication system, wherein the de-interleaver comprises:
- (A) a symbol buffer;
- and
- (B) an address generation unit adapted to generate symbol addresses for reading interleaved symbols from or writing de-interleaved symbols to the symbol buffer, wherein the address generation unit implements a closed-form expression relating each interleaved symbol position to a corresponding de-interleaved symbol position to generate a de-interleaved symbol position for each symbol in an interleaved symbol stream wherein the closed-form expression corresponds to two or more different sets of mathematical operations being applied to bits in a binary value representing each interleaved symbol position to generate bits in a binary value representing a corresponding de-interleaved symbol position.
Dependencies are inferred from the claim text.