General purpose decode implementation for multiported memory array circuits

A decoder circuit with a precharge and an evaluate state, the decoder including an output section comprising:

• a first input for receiving a first signal, a second input for receiving a second signal, and an output for providing a dynamic output signal that is true during the evaluate state if one of the first and second signals is true during the evaluate state;
• a precharged node;
• and
• a first transistor operably connected to the first input and between the precharged node and ground to discharge the precharged node if the first signal is true during the evaluate state, wherein the first transistor is adapted to receive the first signal in order to turn off when the first signal is false and turn on when the first signal is true, the first signal being pulsed to only be true in the evaluate state, whereby the first transistor is off during the precharged state.

A word line decoder having a precharge state and an evaluate state, comprising:

• a store section having inputs for receiving one or more store enable signals and an output for providing a store output signal, wherein the store output signal is true when the one or more store enable signals are true, the store section having a ratioed gate with an input for receiving a first of the one or more store enable signals and an output that is true when the one or more store enable signals are true, wherein the store output corresponds to the store section ratioed gate output;
• a load section having inputs for receiving one or more load enable signals and an output for providing a load output signal, wherein the load output signal is true when the one or more load enable signals are true, the load section having a ratioed gate with an input for receiving a first of the one or more load enable signals and an output that is true when the one or more load enable signals are true, wherein the load output corresponds to the output of the load section ratioed gate;
• and
• an output section having a store input connected to the store output, a load input connected to the load output, and a word line output that provides a true value during the evaluate state if one of the store and load outputs are true.