Parallel-to-parallel converter including common multiple register
AssigneeNEC Corporation
InventorKazuyuki Nakamura
Life of this patent
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Abstract
In a parallel-to parallel converter for converting an “m”-bit parallel signal into an “n”-bit parallel signal, a common multiple register has a bit width which is a common multiple of “m” and “n”. An input selector is connected to an input of the common multiple register, and writes the “m”-bit parallel signal into the common multiple register at a predetermined frequency. An output selector is connected to an output o f the common multiple register, and reads the “n”-bit parallel signal from the common multiple register at a frequency equal to m/n times the predetermined frequency.
Claims15
A parallel-to-parallel converter for converting an “m”-bit parallel signal into an “n”-bit parallel signal, comprising:
- a common multiple register having a bit width which is a common multiple of “m” and “n”;
- an input selector, connected to an input of said common multiple register, for writing said “m”-bit parallel signal into said common multiple register at a predetermined frequency;
- and
- an output selector, connected to an output of said common multiple register, for reading said “n”-bit parallel signal from said common multiple register at a frequency equal to m/n times said predetermined frequency.
A parallel-to serial converter circuit comprising:
- a parallel-to-parallel converter for converting a “m”-bit parallel signal into a “n”-bit parallel signal where “n” is the i-th power of 2 (i=1,2,---);
- and
- a tree-type parallel-to-serial converter, connected to said parallel-to parallel converter, for converting said “n”-bit parallel signal into a serial signal,
- said parallel-to-parallel converter comprising:
- a common multiple register having a bit width which is a common multiple of “m” and “n”;
- an input selector, connected to an input of said common multiple register, for writing said “m”-bit parallel signal into said common multiple register at a predetermined frequency;
- and
- an output selector, connected to an output of said common multiple register, for reading said “n”-bit parallel signal from said common multiple register at a frequency equal to m/n times said predetermined frequency.
A serial-to-parallel converter circuit comprising:
- a tree-type serial-to-parallel converter for converting a serial signal into an “m”-bit parallel signal where “m” is the i-th power of 2 (i=1,2, --- );
- and
- a parallel-to-parallel converter for converting said “m”-bit parallel signal into a “n”-bit parallel signal, said parallel-to-parallel converter comprising:
- a common multiple register having a bit width which is a common multiple of “m” and “n”;
- an input selector, connected to an input of said common multiple register, for writing said “m”-bit parallel signal into said common multiple register at a predetermined frequency;
- and
- an output selector, connected to an output of said common multiple register, for reading said “n”-bit1parallel signal from said common multiple register at a frequency equal to m/n times said predetermined frequency.
A parallel-to-parallel converter for converting an “m”-bit input signal having a predetermined frequency into an “n”-bit output signal having a frequency m/n times said predetermined frequency, one of “m” and “n” being the i-th power of 2(i=1,2, . . .),
- said converter including a common multiple register having a bit width which is a common multiple of said “m” and said “n”.
A parallel-to-parallel converter comprising:
- a holding means constituted by a number of registers, the number being equal to a common multiple of “m” and “n”;
- a write means for writing an “m”-bit input signal into said registers with an input frequency;
- and
- a read means for reading an “n”-bit output signal from said registers with a frequency equal to m/n times said input frequency.
Dependencies are inferred from the claim text.