Rate 32/33 (D=0, K=6) run length limited modulation code having optimized error propagation

A method for generating a (d=0, k=6) rate 32/33 channel code for use in a partial response, sampling data detection channel to encode a series of 32-bit user digital data words, the method comprising the steps of:

• dividing each 32-bit user data word into eight four-bit data nibbles,
• determining whether any of the data nibbles contain all zeros,
• if not, mapping the eight four-bit data nibbles to seven four-bit code nibbles and one five-bit code sub-word, and setting a fifth bit of the code sub-word to one, and
• if so, embedding location of a code violation within at least the five-bit code sub-word, and mapping a data nibble otherwise mapping to the sub-word to a code nibble otherwise receiving the data nibble determined to have a code violation.

A method for generating a (d=0, k=6) rate 32/33 channel code for a partial response, sampling data detection channel to encode a series of user digital data bits, comprising the steps of:

• forming a sequence of 32-bit user data words,
• dividing each 32-bit user data word into eight four-bit data nibbles,
• determining whether any of the data nibbles contain all zeros,
• if no data nibbles are found to contain all zeros, then mapping the eight four-bit data nibbles to seven four-bit code nibbles and one five-bit code sub-word, and setting a first control bit of the code sub-word, comprising a fifth bit position thereof, to one, else
• if a single data nibble is determined to contain all zeros as a code violation, then embedding location of the code violation within at least the five-bit code sub-word, and mapping a data nibble otherwise mapping to the five-bit code sub-word to a code nibble otherwise receiving the data nibble determined to have a code violation, else
• if two data nibbles are determined to contain all zeros, then setting the first control bit to zero, setting a second control bit of the code sub-word to zero, and setting a third control bit within a second code sub-word to one, setting the remaining three bits of the first code sub-word to identify one of the two data nibbles containing all zeros within a first predetermined range of data nibbles, and setting the remaining three bits of the second code sub-word to identify the other of the two data nibbles containing all zeros within a second predetermined range of data nibbles, relocating a data nibble otherwise mapping to the first code sub-word to a code sub-word otherwise receiving the data nibble identified by the first code sub-word to contain all zeros, and relocating a data nibble otherwise mapping to the second code sub-word to a code sub-word otherwise receiving the data nibble identified by the second code sub-word to contain all zeros, else
• if three or more data nibbles are determined to contain all zeros, then generating an eight-bit flag wherein each bit position of the flag identifies a data nibble determined to contain all zeros, and writing the eight bit flag into predetermined control bit positions defined in the first code sub-word, the second code-sub word, and a third code sub-word.