Adjustable level shifter circuits for analog or multilevel memories

An integrated circuit comprising:

• a first programmable level shifter providing a VPP output voltage that is a first offset voltage above an analog input, wherein the first offset voltage is programmably selectable;
• a second programmable level shifter providing a target VT output voltage that is a second offset voltage above the analog input, wherein the second offset voltage is programmably selectable;
• and
• a memory cell to store the analog input, wherein the VPP output voltage and the target VT output voltage are coupled to the memory cell.

A method of operating an integrated circuit comprising:

• providing an analog signal input;
• taking a sample of the analog signal input wherein the analog signal is sampled at a user selectable sampling frequency;
• generating a first voltage above the sample input by a first offset value;
• generating a second voltage above the sample by a second offset value;
• pulsing a node of a memory cell using the first voltage;
• evaluating a threshold voltage of the memory cell using the second voltage, wherein the second voltage is coupled to a control electrode of the memory cell;
• pulsing and evaluating the memory cell until the threshold voltage of the memory cell is at a target value.

A method of programming a memory cell of an integrated circuit comprising:

• generating a first programming voltage;
• generating a second programming voltage, above the first programming voltage by an offset value;
• coupling the second programming voltage to a control gate of the memory cell to alter a stored threshold voltage of the memory cell;
• coupling the first programming voltage to the control gate to evaluate whether the stored threshold voltage is at least a target threshold voltage level;
• and
• repetitively coupling the first and second program voltages to the control gate until the stored threshold voltage is at least the target threshold voltage level.