High voltage output stage for driving an electric load
AssigneeSTMicroelectronics S.r.l.
InventorsRiccardo Depetro, Fabrizio Martignoni, Enrico Scian
Life of this patent
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Abstract
The invention relates to a high-voltage final output stage for driving an electric load, of the type which comprises a complementary pair of transistors connected between first and second supply voltage references, and at least one PMOS pull-up transistor connected in series with an NMOS pull-down transistor. The stage comprises an additional PMOS transistor connected in parallel with the pull-up transistor and having the body terminal in common therewith. More particularly, the body terminals of both PMOS transistors are formed in the semiconductor within a common well which can withstand high voltages, and the additional transistor is a thick oxide PMOS power transistor.
Claims20
A high-voltage final output stage for driving an electric load, comprising
- a complementary pair of transistors connected between first and second supply voltage references, and including a PMOS pull-up transistor connected to an NMOS pull-down transistor;
- and
- a thick-oxide PMOS power transistor connected in parallel with the pull-up transistor and shares a body terminal in common therewith.
A driver circuit for driving an electric load, comprising:
- a level shifter having first and second outputs;
- and
- a high-voltage output stage having a complementary pair of transistors connected between first and second supply voltage references, the complementary pair including a pull-up first transistor connected to a pull-down second transistor at an output node, the output stage also including a third transistor connected in parallel with the second transistor between the first supply voltage reference and the output node, the second transistor having a control terminal coupled to the first output of the level shifter and the third transistor having a control terminal coupled to the second output of the level shifter, the second and third transistors sharing a body terminal in common with each other, wherein the second transistor is a thin oxide PMOS power transistor and the third transistor is a thick oxide PMOS power transistor.
A method of driving an electrical load, comprising:
- providing an output stage with first and second output transistors connected in parallel between a first supply voltage reference and an output node and having a shared body terminal in common with each other, the first output transistor being a thin oxide MOS transistor and the second output transistor being a thick oxide MOS transistor;
- and
- biasing the shared body terminal to a higher voltage than the first supply voltage reference, thereby reducing a current conduction rate of the first output transistor to a greater degree than a current conduction rate of the second output transistor is reduced.
A method of driving a load using a high-voltage output stage having first and second output transistors connected in parallel between a first supply voltage reference and an output node, each output transistor having a control terminal, the first output transistor being a thin-oxide MOS transistor and the second output transistor being a thick-oxide MOS transistor, the method comprising:
- receiving a first logical input signal;
- producing a level shifted first output signal in response to the first logical input signal;
- producing a level shifted second output signal in response to the first logical input signal;
- driving the control terminal of the first output transistor with the first output signal;
- and
- driving the control terminal of the second output transistor with the second output signal.
Dependencies are inferred from the claim text.