Bus-hold input circuit adapted for receiving input signals with voltage levels higher than the voltage supply thereof

A circuit interfacing an external signal line to an integrated circuit, comprising:

• a first circuit having a first input and a first output, the first circuit inverting a signal on the first input to provide an output signal on the first output;
• a second circuit having a second input coupled to the first output and a second output coupled to the first input, the second circuit inverting a signal on the second input to provide a second output signal on the second output, the first and second circuits collectively forming a latch;
• and
• a third circuit having a third input coupled to the first input, a fourth input coupled to a supply voltage of the second circuit and an output coupled to a supply node of the second circuit, the third circuit supplying the greater of a voltage on the first input and the supply voltage to the supply node, the third circuit comprising a MOSFET having a gate directly connected to the first input.

A method of varying a voltage supplied to a power node of a logic element comprising:

• coupling an input signal to an input of a switching circuit;
• comparing a voltage of the input signal to a power supply voltage by directly connecting a gate of a first p-channel MOSFET to the input signal;
• and
• coupling the input signal to the power node when the input signal voltage is greater than the power supply voltage.

A circuit interfacing an external signal line to an integrated circuit, comprising:

• a first circuit having a first input and a first output, the first circuit inverting a signal on the first input to provide an output signal on the first output;
• a second circuit having a second input coupled to the first output and a second output coupled to the first input, the second circuit inverting a signal on the second input to provide a second output signal on the second output;
• and
• a transistor configured to supply the greater of a voltage on the first input and a supply voltage to a supply node of the second circuit, the transistor comprising:
• a body;
• a source coupled to the supply voltage;
• a gate coupled to the first input;
• and
• a drain coupled to the supply node of the second circuit and to the body.