Semiconductor integrated circuit testing apparatus with reduced installation area

An apparatus for testing semiconductor integrated circuits comprising:

• a horizontally elongated box-shaped main frame housing therein an IC tester part conducting an electrical test on a semiconductor integrated circuit under test;
• two testing heads each including contact means connected through an associated cable to said IC tester part, said contact means being supported on the associated testing head in the state that said contact means is exposed on one face of the associated testing head, each of said testing heads being movable between a first position where the one face of the testing head on which said contact means is exposed faces downward and a second position where said one face of the testing head faces upward;
• drive means for selectively moving said two testing heads between said respective first and second positions;
• and
• two wafer probers disposed adjacent said main frame, each including on a top face thereof a contact section adapted to contact with the contact means of the associated testing head when the associated testing head is moved to said first position,
• said contact section of each of said wafer probers being in contact with terminals of semiconductor integrated circuit to be tested supplied to each associated wafer prober, thereby to enable the testing of the semiconductor integrated circuit by said IC tester part, wherein:
• said two wafer probers are arranged side by side transversely of said main frame such that said respective contact sections of said wafer probers install themselves within a transverse width of said main frame;
• said drive means includes two output shafts;
• and
• each of said two testing heads is mounted to each of said output shafts and selectively rotated about 180° by the corresponding output shafts so that each of said testing heads is turned over between said first position where each of said testing heads overlies each of the associated connecting sections and said second position where each of said testing heads overlies above a too of said main frame in the state that the one face of the testing head on which said contact means is exposed faces upward.

A semiconductor integrated circuits testing apparatus designed to take up less space than earlier such testing apparatuses, said semiconductor integrated circuits testing apparatus comprising:

• a box-shaped main frame housing therein an IC tester part conducting an electrical test on a semiconductor integrated circuit to be tested;
• a wafer prober disposed adjacent to said main frame and including a contact section which is exposed upward from a top face of said wafer prober;
• a testing head including contact means connected through a cable to said IC tester part and exposed outward from one face of said testing head,
• said testing head being movable between a first position where the contact means of said testing head faces downward and overlies said wafer prober and a second position where the contact means of said testing head faces upward and overlies an outer space out of said wafer prober in a plan view;
• and
• rotary drive means including a horizontally mounted shaft to which said testing head is secured for rotating said shaft almost 180°, so that said testing head is moved between said first and second positions;
• said contact section of said wafer prober contacting with the contact means of said testing head when the testing head is moved to said first position and contacting with terminals of the semiconductor integrated circuit to be tested which is supplied into said wafer prober, thereby enabling the testing of the semiconductor integrated circuit by said IC tester part, wherein:
• said main frame is disposed adjacent to said wafer prober so that a portion of said main frame occupies said outer space;
• the testing head is above the top of the main frame when the testing head is in the second position;
• and
• said testing head overlies the portion of said main frame in such a state as exposing said contact means upward when it is moved to said second position by said drive means,
• whereby said outer space is utilized by said main frame effectively.

A semiconductor integrated circuits testing apparatus designed to take up less space than earlier such testing apparatuses, said semiconductor integrated circuits testing apparatus comprising:

• a box-shaped main frame housing therein an IC tester part conducting an electrical test on a semiconductor integrated circuit to be tested;
• a wafer prober disposed adjacent to said main frame and including a contact section which is exposed upward from a top face of said wafer prober,
• said contact section of said wafer prober contacting with terminals of the semiconductor integrated circuit to be tested which is supplied to said wafer prober;
• a testing head including a front face and a rear face opposite to said front face and including contact means connected through a cable to said IC tester part and exposed outward from the front face of said testing head;
• and
• means for setting said testing head selectively in a first position where the front face of said testing head faces downward and overlies said wafer prober so as to allow said contact means to contact with the contact section laid thereunder, thereby enabling the testing of the semiconductor integrated circuit by said IC tester part, or in a second position where the front face of said testing head faces upward and the rear face faces downward and overlies an outer space out of said wafer prober in a plan view, thereby enabling said contact means and contact section both positioned apart and facing upwardly to be easily subjected to their maintenance service, respectively, wherein:
• said testing head is above the top of the main frame when the testing head is set in the second position by said means for setting;
• said main frame is disposed adjacent to said wafer prober in such a manner that a portion of said main frame occupies said outer space, so that said testing head overlies the portion of said main frame when it is set in said second position by said setting means in the state as exposing said contact means upward,
• whereby said outer space is effectively utilized by occupation by said main frame.

A semiconductor integrated circuits testing apparatus designed to take up less space than earlier such testing apparatuses, said semiconductor integrated circuits testing apparatus comprising:

• a horizontally elongated box-shaped main frame housing therein an IC tester part conducting an electrical test on a semiconductor integrated circuit to be tested;
• two wafer probers disposed adjacent to said main frame and each of said wafer probers including a contact section which is exposed upward from a respective top face of said wafer probers,
• said contact section of each of said wafer probers being configured to contact with terminals of the semiconductor integrated circuit to be tested which is supplied to said wafer prober;
• two testing heads, each of the testing heads including a front face and a rear face opposite to said front face and contact means connected through a cable to said IC tester part and exposed outward from the front face of said testing head;
• and
• means for setting each of said testing heads selectively in a first position where the front face of said testing head faces downward and overlies an associated one of said wafer probers so as to allow said contact means of said testing head to contact with the contact section laid thereunder, thereby enabling the testing of the semiconductor integrated circuit by said IC tester part, or in a second position where the front face of said testing head faces upward and the rear face faces downward and overlies an outer space out of said associated one of said one of said wafer probers in a plan view, thereby enabling said contact means and contact section both positioned apart and facing upwardly to be easily subjected to their maintenance service, respectively, wherein:
• each of said testing heads is above the top of the main frame when each said testing head is set in the second position by said means for setting;
• said main frame is disposed adjacent to said wafer probers in such a manner that a portion of said main frame occupies said outer space, so that said testing heads the portion of said main frame when either of the testing heads are set in said second position by said setting means in the state as exposing said contact means upward,
• whereby said outer space is effectively utilized by occupation by said main frame.