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US 6,184,571 B2Granted
Method and apparatus for endpointing planarization of a microelectronic substrate
AssigneeMicron Technology, Inc.
InventorJohn T. Moore
Life of this patent
Estimating the term…
Abstract
A method and apparatus for endpointing a planarization process of a microelectronic substrate. In one embodiment, the microelectronic substrate can include a semiconductor base, a first material, such as an oxide, disposed on the base, a second material, such as a nitride, disposed on the first material to stiffen the first material, and an endpointing material, such as polysilicon, disposed on the second material. The endpointing material can have a hardness and/or a fracture resistance that is less than a hardness and/or a fracture resistance of the stiffening material and, in one embodiment, can have a coefficient of friction that is different than surrounding material of the microelectronic substrate so as to be detected when exposed to a planarizing medium.
Claims39
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material;
- a second material disposed on the first material;
- and
- an endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein the first, second and endpointing materials together define a stack, further wherein a thickness of the endpointing material is in the range of approximately 10% to approximately 90% of a thickness of the stack.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a surface with a device region and an isolating region adjacent the device region, the isolating region having semiconductor material removed therefrom and being recessed into the surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material in the device region;
- a second material disposed on the first material;
- and
- a third material disposed on the second material, the third material having a fracture resistance that is greater than a fracture resistance of the second material wherein the first, second and endpointing materials together define a stack, further wherein a thickness of the endpointing material is in the range of approximately 10% to approximately 90% of a thickness of the stack.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material;
- a second material disposed on the first material;
- and
- an endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein the endpointing material is selected from polysilicon, tungsten nitride and titanium nitride.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material;
- a second material disposed on the first material;
- and
- an endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein a thickness of the endpointing material is in the range of approximately 5 nm to approximately 50 nm.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material;
- a second material disposed on the first material;
- and
- an endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein a thickness of the second material is in the range of approximately 20 nm to approximately 200 nm.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material;
- a second material disposed on the first material;
- and
- an endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein the first material forms a layer approximately 60Å thick.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a surface with a device region and an isolating region adjacent the device region, the isolating region having semiconductor material removed therefrom and being recessed into the surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material in the device region;
- a second material disposed on the first material;
- and
- a third material disposed on the second material, the third material having a fracture resistance that is greater than a fracture resistance of the second material wherein the third material is selected from polysilicon, tungsten nitride and titanium nitride.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a surface with a device region and an isolating region adjacent the device region, the isolating region having semiconductor material removed therefrom and being recessed into the surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material in the device region;
- a second material disposed on the first material;
- and
- a third material disposed on the second material, the third material having a fracture resistance that is greater than a fracture resistance of the second material wherein a thickness of the endpointing material is in the range of approximately 5 nm to approximately 50 nm.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a surface with a device region and an isolating region adjacent the device region, the isolating region having semiconductor material removed therefrom and being recessed into the surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material in the device region;
- a second material disposed on the first material;
- and
- a third material disposed on the second material, the third material having a fracture resistance that is greater than a fracture resistance of the second material wherein a thickness of the second material is in the range of approximately 20 nm to approximately 200 nm.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a surface with a device region and an isolating region adjacent the device region, the isolating region having semiconductor material removed therefrom and being recessed into the surface of the semiconductor material;
- a first material disposed on the device region of the semiconductor material in the device region;
- a second material disposed on the first material;
- and
- a third material disposed on the second material, the third material having a fracture resistance that is greater than a fracture resistance of the second material wherein the first material forms a layer approximately 60Å thick.
2 more elements
A microelectronic substrate, comprising:
- a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and an etched trench recessed relative to the device region;
- an oxide layer disposed on the device region of the semiconductor material;
- a nitride layer disposed on the oxide layer to stiffen the oxide layer;
- and
- an endpointing layer disposed on the nitride layer, the endpointing layer including a polysilicon material and having a hardness less than a hardness of the nitride layer.
2 more elements
Dependencies are inferred from the claim text.