Semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass, and a semiconductor structure

A semiconductor processing method of forming a contact opening comprising:

• forming a field isolation mass within a semiconductor substrate by a trench and refill technique, the field isolation mass having an upper portion which extends elevationally above a next adjacent substrate surface, and a lower portion elevationally below the upper portion;
• forming an etch-protective material over the entire upper portion of the field isolation mass comprising a material which is etchably different from the field isolation mass;
• forming an insulating material over the substrate;
• and
• etching a contact opening through the insulating layer adjacent the field isolation mass selectively relative to the etch-protective material.

A semiconductor processing method of forming a contact opening comprising:

• forming a field isolation mass within a semiconductor substrate by a trench and refill technique, the field isolation mass being capped with an etch stop cap;
• forming at least a portion of a device component spaced from the field isolation mass, the field isolation mass having an exposed isolation mass sidewall;
• forming an etch stop cover over the exposed isolation mass sidewall;
• forming an insulating layer over the isolation mass and device component portion;
• and
• etching a contact opening through the insulating layer to between the isolation mass sidewall and device component portion selectively relative to the isolation mass etch stop cap and cover.

A semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass comprising:

• forming a field isolation mass supported by a semiconductor substrate, and a substrate masking layer over the substrate adjacent the field isolation mass, the field isolation mass being capped with an etch stop cap, the field isolation mass having a sidewall covered by the masking layer;
• removing the substrate masking layer away from the isolation mass to expose at least a portion of the isolation mass sidewall;
• forming an etch stop cover over the exposed isolation mass sidewall;
• forming an insulating layer over the isolation mass and substrate area adjacent the isolation mass;
• and
• etching a contact opening through the insulating layer to adjacent the isolation mass selectively relative to the isolation mass etch stop cap and cover.

A semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass comprising:

• forming a field isolation mass within a semiconductor substrate, and an electrically conductive masking layer over the substrate adjacent the field isolation mass, the field isolation mass having a sidewall covered by the substrate masking layer, the field isolation mass and masking layer defining a generally planar outer surface;
• after said forming, removing an amount of the field isolation mass sufficient to define a field isolation mass surface spaced inwardly from the masking layer planar outer surface;
• forming an etch stop cap atop the field isolation mass surface;
• after said forming of said etch stop cap, patterning the substrate masking layer away from the isolation mass to form at least a portion of a device component spaced from the isolation mass;
• forming an insulating layer over the isolation mass and device component;
• and
• etching a contact opening through the insulating layer to between the isolation mass sidewall and device component selectively relative to the isolation mass etch stop cap.

A semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass comprising:

• forming a field isolation mass within a semiconductor substrate, and a substrate masking layer over the substrate adjacent the field isolation mass, the field isolation mass having a sidewall covered by the substrate masking layer, the field isolation mass and substrate masking layer defining a generally planar first surface;
• removing an amount of field isolation mass to define a second surface below the first surface;
• forming a layer of etch stop material over the first and second surfaces;
• planarizing the etch stop material to at least the first surface to define an etch stop cap on the field isolation mass;
• patterning the substrate masking layer away from the isolation mass to expose the isolation mass sidewall;
• forming an etch stop cover over the exposed isolation mass sidewall;
• forming an insulating layer over the isolation mass and device component;
• and
• etching a contact opening through the insulating layer to between the isolation mass sidewall and device component selectively relative to the isolation mass etch stop cap and cover.