Method for forming high density nonvolatile memories with high capacitive-coupling ratio

A method for forming a nonvolatile memory cell with rugged tunnel oxide layers, said method comprising:

• forming a silicon oxide layer on a semiconductor substrate;
• forming a silicon nitride layer on said silicon oxide layer;
• patterning said silicon nitride layer to define tunnel oxide region and expose a portion of said silicon oxide layer which defines a non-tunnel region of said semiconductor substrate;
• performing a first thermal oxidation to oxidize a portion of said semiconductor substrate exposed by said silicon nitride, thereby generating a non-tunnel oxide on said semiconductor substrate;
• removing said silicon nitride layer;
• implanting ions into said semiconductor substrate to form doped regions to serve as source and drain using said non-tunnel oxide as a mask;
• performing an annealing to said semiconductor substrate and simultaneously driving said ions into said semiconductor substrate;
• removing said silicon oxide layer;
• forming a hemispherical grained silicon (HSG-silicon) layer on said semiconductor substrate;
• performing a wet etching to etch back said hemispherical grained silicon (HSG-silicon) layer and said doped regions;
• forming oxide layers on said doped regions to serve as said rugged tunnel oxides;
• forming a floating gate over said tunnel and non-tunnel oxides;
• forming a dielectric layer on said floating gate;
• and
• forming a control gate on said dielectric layer.