Method for fabricating a semiconductor device

A method of forming an integrated circuit memory device, comprising the steps of:

• forming first and second pluralities of insulated-gate field effect transistors on a cell array portion and a peripheral circuit portion of a semiconductor substrate, respectively;
• forming a first interlayer insulating layer on the first and second pluralities of insulated-gate field effect transistors;
• then
• forming a first interconnection wiring line that extends through the first interlayer insulating layer and electrically contacts a source/drain of an insulated-gate field effect transistor within the second plurality of insulated-gate field effect transistors;
• then
• forming an upper interlayer insulating layer on the first interlayer insulating layer and on the first interconnection wiring line;
• then
• forming a bit line that extends on the upper interlayer insulating layer and through the upper and first interlayer insulating layers and is electrically coupled to a first source/drain region of a first insulated-gate field effect transistor within the first plurality of insulated-gate field effect transistors;
• and
• forming a storage electrode of a capacitor that extends on the upper interlayer insulating layer and through the upper and first interlayer insulating layers and is electrically coupled to a second source/drain region of the first insulated-gate field effect transistor.