Minimizing program code storage for performing regular and repetitive operations in a programmable processor
AssigneeFrance Telecom
InventorsFrédéric Dufal, Gilles Privat
Life of this patent
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AssigneeFrance Telecom
InventorsFrédéric Dufal, Gilles Privat
Estimating the term…
The program memory comprises a first segment (MP1) containing a succession of program words including first base words (MMA) each having a size less than the sum of the respective sizes of the control words destined for the execution units (UXi), and second base words (MMB) fewer in number than that of the first base words. Facilities sequentially extract the various program words from the first segment of the program memory. A storage facility (RG) is connected to the output of the program memory. Facilities (MXM) update the content of the storage facility at least on the basis of each extracted second base word, and computational facilities (MEB) sequentially compute certain at least of the various groups of control words, on the basis of the combining according to at least one predetermined logic relation, of the content of the storage facility and of an extracted first base word, so as to minimize the memory size of the said program code.
Process for the simultaneous control of a plurality of execution units of a programmable processor, in which control words destined for different said execution units are generated in succession from a program code stored in a program memory, comprising the steps:
Process for the simultaneous control of a plurality of execution units of a programmable processor, in which control words destined for different said execution units are generated in succession from a program code stored in a program memory, comprising the steps:
Dependencies are inferred from the claim text.