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US 6,181,599 B2Granted
Method for applying variable row BIAS to reduce program disturb in a flash memory storage array
AssigneeSanDisk Corporation
InventorGeoff Gongwer
Life of this patent
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Abstract
Program disturb in a Flash storage array is reduced by applying a voltage level that depends on the threshold level of a previously programmed cell to the word-line of that cell during programming of subsequent cells on the same bit-line. By applying higher voltages to word-lines containing unselected programmed memory cells with higher threshold voltages, program disturb due to these higher threshold cells is reduced.
Claims14
A method for writing a data value to a selected memory cell in an array of memory cells, comprising simultaneously:
- applying a first voltage to a first word-line in the array, wherein the memory cell is coupled to the first word-line, and application of the first voltage and voltages applied to a source and a drain of the selected memory cell changes the threshold voltage of the selected memory cell towards a state indicating the data value being written;
- applying a second voltage to a second word-line in the array, wherein a memory cell coupled to the second word-line is in an erased state;
- and
- applying a third voltage to a third word-line in the array, wherein a memory cell coupled to the third word-line has been written with a data value not corresponding to the erased state, the third voltage being dependent on the magnitude of the data value written to the memory cell coupled to the third word-line.
1 more element
Dependencies are inferred from the claim text.