Digital signal processing assembly and test method

A printed circuit board having at least twelve footprints capable of mounting integrated circuits, said printed circuit board comprising:

• a plurality of conductive layers;
• a plurality of insulation layers, wherein each of the plurality of conductive layers is separated by one of said plurality of insulation layers, said layers having dimensions of approximately 11.43 centimeters in length and approximately 2.5 centimeters in height;
• a first plurality of surface mount pads within said footprints adapted to mount half of said at least twelve integrated circuits on a first of said plurality of conductive layers, wherein said first of said plurality of conductive layers forms a top signal layer of said printed circuit board;
• a second plurality of surface mount pads within said footprints adapted to mount half of said at least twelve integrated circuits on a second of said plurality of conductive layers, wherein said second of said plurality of conductive layers forms a bottom signal layer of said printed circuit board;
• and
• a plurality of microvias within each of said first and second plurality of surface mount pads, wherein each of said plurality of microvias directly electrically connects either said top signal layer to a first ground layer or said bottom signal layer to a second ground layer.