Method of forming a layered wiring structure including titanium silicide

A method of manufacturing a dual gate CMOS semiconductor device, comprising the steps of:

• forming a non-single-crystal silicon film on a semiconductor substrate;
• introducing a first dopant for determining a first conductivity type and a second dopant for determining a second conductivity type into different regions of the non-single-crystal silicon film;
• sequentially forming a titanium film and a metal silicide film on the non-single-crystal silicon film;
• forming a titanium silicide film of a C49 and/or C54 structure by performing a heat treatment so as to cause the titanium film to react with the non-single-crystal silicon film while reducing a first native oxide film formed in a first interface between the titanium film and the non-single-crystal silicon film, and a second native oxide film formed in a second interface between the titanium film and the metal silicide film;
• patterning the non-single-crystal silicon film, the titanium silicide film, and the metal silicide film to form first and second gate electrodes respectively having the first and second conductivity types.