Modular, hybrid processor and method for producing a modular, hybrid processor
AssigneeVirtual Computer, Inc.
InventorSteve M. Casselman
Life of this patent
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Abstract
A method is disclosed for integrating a field programmable gate array (FPGA) with a microprocessor to form a single, multi-chip or stacked, hybrid processor module. The method includes the identification and parallel routing of selected I/O pins of the FPGA and microprocessor. The method further includes the identification and routing of control pins of the FPGA and microprocessor to a controller, and, the establishment of an interface between the controller, the FPGA and the microprocessor in order to develop a processor module for coordinated processing of data utilizing both the FPGA and microprocessor resources.
Claims3
A method for integrating a field programmable gate array (FPGA) resource having a first set of defined input/output (I/O) ports with a data processor having a second set of defined I/O ports within a single module, comprising the steps of:
- identifying I/O ports of the FPGA and processor operable in parallel;
- identifying control ports of the FPGA and processor;
- routing the control ports to a controller;
- establishing a controller-to-FPGA (C:F) interface through the control pins of the FPGA;
- establishing a processor-to-controller (P:C) interface through the control pins of the processor;
- and,
- logically connecting the C:F and P:C interfaces;
- wherein the step of indentifying I/O ports operable in parallel comprises the steps of:
- identifying non-control, non-power, and non-ground ports of the FPGA and processor,
- determining whether the identified ports are bi-directional,
- determining whether bi-directional, identified ports are tri-stable, and
- routing in parallel bi-directional, tri-stable identified ports.
Dependencies are inferred from the claim text.