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AssigneeKabushiki Kaisha Toyota Chuo Kenkyusho
InventorsTakashi Suzuki, Sachiko Kawaji, Tsutomu Uesugi
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A semiconductor device containing a lateral MOS transistor comprising a silicon substrate, an n-type first semiconductor layer constituting a drain drift region, a p-type second semiconductor layer prepared within the first semiconductor layer to constitute a body region and with a channel region formed within a portion of said body region, an n-type third semiconductor layer prepared on the surface of the second semiconductor layer to constitute a source region, an n-type fourth semiconductor layer constituting a drain region, and an insulation layer that is constituted of insulating material filled into a trench prepared in the first semiconductor layer and arranged along the two sides of the drain region. The drain region is formed into a region deeper than the insulation layer and in contact with the drain drift region at a portion beneath the insulation layer. The semiconductor device provides a high breakdown voltage and a low on-resistance, and can be fabricated with a reduced cell pitch.
A semiconductor device containing a lateral MOS transistor, comprising:
A semiconductor device containing a lateral MOS transistor, comprising:
Dependencies are inferred from the claim text.