Method of manufacturing a thin film transistor using multiple sputtering chambers
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hongyong Zhang, Takashi Inushima, Takeshi Fukada
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hongyong Zhang, Takashi Inushima, Takeshi Fukada
Estimating the term…
A method of manufacturing thin film field effect transistors is described. The channel region of the transistors is formed by depositing an amorphous semiconductor film in a first sputtering apparatus followed by thermal treatment for converting the amorphous phase to a polycrystalline phase. The gate insulating film is formed by depositing an oxide film in a second sputtering apparatus connected to the first apparatus through a gate valve. The sputtering for the deposition of the amorphous semiconductor film is carried out in an atmosphere comprising hydrogen in order to introduce hydrogen into the amorphous semiconductor film. On the other hand the gate insulating oxide film is deposited by sputtering in an atmosphere comprising oxygen.
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
A method of manufacturing an insulated gate field effect transistor comprising:
A method of manufacturing an insulated gate field effect transistor having a channel region comprising a single semiconductor layer comprising:
Dependencies are inferred from the claim text.