System for digital filtering in a fixed number of clock cycles

A digital filter, comprising:

• a multiplier;
• an adder;
• a first plurality of latches to present latched data samples to said multiplier in each of four multiplier clock cycles;
• a second plurality of latches to present latched data samples to said adder in each of four adder clock cycles;
• and
• at least one of said four multiplier clock cycles occurring concurrently overlapping with at least one of said four adder clock cycles,
• wherein one of said second plurality of latches presenting B2W(n−2) and another of said second plurality of latches presenting B1W(n−1) to said adder to calculate a sum for a current data frame substantially simultaneously with one of said first plurality of latches presenting AS and another of said first plurality of latches presenting Y(n) to said multiplier to calculate a product wherein B2 and B1 are coefficients relating to said current filter channel, AS is a scaling factor, W(n−1) is a state variable of a previous data frame, and W(n−2) is a state variable for a data frame two frames previous.

A method of providing a plurality of digital filter channels in a fixed number of clock cycles, said method comprising:

• (a) performing three multiplication calculations relating to a first one of said plurality of digital filter channels, in three multiplication clock cycles, respectively;
• (b) performing four addition calculations relating to a first one of said plurality of digital filter channels, in four addition clock cycles, respectively;
• (c) multiplying a result of one of said addition calculations by a scaling factor in a fourth multiplication clock cycle to arrive at an output for said first one of said plurality of digital filter channels;
• and
• (d) performing at least one of a multiplication calculation and an addition calculation for a second one of said plurality of digital filter channels substantially simultaneously with at least one of said steps (a), (b) and (c).

The method of providing a plurality of digital filter outputs for a plurality of digital filter channels in a fixed number of clock cycles, said method comprising:

• (a) performing three multiplication calculations relating to a first one of said plurality of digital filter channels, in three multiplication clock cycles, respectively;
• (b) retrieving data relating to a second one of said plurality of digital filter channels;
• (c) performing four addition calculations relating to a first one of said plurality of digital filter channels, in four addition clock cycles, respectively;
• (d) multiplying a result of one of said four addition calculations by a scaling factor in a fourth multiplication clock cycle to arrive at an output for said first one of said plurality of digital filter channels;
• and
• (e) substantially simultaneous with said step (c) performing three multiplication calculations relating to said second one of said plurality of digital filter channels, in three multiplication clock cycles, respectively.

A plurality of digital filter channels operable in a fixed number of clock cycles, said plurality of digital filter channels comprising:

• means for performing three multiplication calculations relating to a first one of said plurality of digital filter channels, in three multiplication clock cycles, respectively;
• means for retrieving data relating to a second one of said plurality of digital filter channels;
• means for performing four addition calculations relating to a first one of said plurality of digital filter channels, in four addition clock cycles, respectively;
• and
• means for multiplying a result of one of said four addition calculations by a scaling factor in a fourth multiplication clock cycle to arrive at an output for said first one of said plurality of digital filter channels;
• and
• means for performing, simultaneous with said means for performing four addition calculations, three multiplication calculations relating to said second one of said plurality of digital filter channels, in three multiplication clock cycles, respectively.

A method of digital filtering, comprising:

• calculating an output of a digital filter for a previous frame of data during a first clock pulse of a clock cycle of a current data frame;
• updating a previous state variable of said previous frame of data during said first clock pulse of a clock cycle;
• adding a product from a previous frame of data and an input data to form a current state variable of said current frame of data during a subsequent clock pulse of said clock cycle;
• adding another product from said previous frame and said current state variable to form an unscaled output of said digital filter;
• wherein a transfer function of said digital filter is based on an equation Y(n)=AS[W(n)+A1W(n−1)+W(n−2)], wherein W is a state variable, AS is a scaling factor, A1 is a constant, W(n) is a state variable for the current data frame, W(n−1) is a state variable for the previous data frame, and W(n−2) is a state variable for a data frame two frames previous.