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US 6,172,419 B2Granted
Low profile ball grid array package
AssigneeMicron Technology, Inc.
InventorLarry D. Kinsman
Life of this patent
Estimating the term…
Abstract
The present invention is a method and apparatus for a very low profile ball grid array package. A substrate is provided with an aperture. A thin sheet material is secured to the substrate, covering the aperture, so as to form a cavity. A semiconductor die is mounted in the formed cavity on the thin sheet material. The semiconductor die is encapsulated with the thin sheet material supporting it during encapsulation. The use of the thin sheet material to form the cavity is a cost effective way to construct a ball grid array package having a very low profile.
Claims26
A low profile ball grid array semiconductor package comprising:
- a base substrate having a top surface and a bottom surface, with an aperture therein which extends from said top surface to said bottom surface;
- a series of conductive traces located on said bottom surface of said base substrate;
- a plurality of conductive balls connected to said series of conductive traces;
- a thin sheet material secured to said base substrate and covering said aperture such that a cavity is formed, said thin sheet material having a thickness of approximately 0.025 to 0.1 mm;
- and
- a semiconductor element mounted in said cavity.
3 more elements
A low profile ball grid array semiconductor package comprising:
- a base substrate having a top surface and a bottom surface, said base substrate having an aperture extending from said top surface to said bottom surface;
- a series of conductive traces located on said bottom surface of said base substrate;
- a plurality of conductive balls connected to said series of conductive traces;
- a thin sheet material thick secured to said top surface of said base substrate and covering said aperture to form a downward facing cavity, said thin sheet material having a thickness of approximately 0.025 to 0.1 mm;
- and
- a semiconductor element mounted in said downward facing cavity.
3 more elements
A low profile ball grid array semiconductor package comprising:
- an insulating substrate having a top surface and a bottom surface, said insulating substrate having an aperture extending from said top surface to said bottom surface;
- a first series of conductive traces located on said top surface of said insulating substrate and a second series of conductive traces located on said bottom surface of said insulating substrate, said first series connected to said second series by via holes in said insulating substrate;
- a thin sheet material approximately 0.025 to 0.1 mm thick secured to said bottom surface of said insulating substrate and covering said aperture such that a cavity is formed;
- a semiconductor element mounted in said cavity, said semiconductor element having a plurality of bond pads, each of said bond pads associated with an input or an output of said semiconductor element;
- a plurality of wire bonds connecting said bond pads of said semiconductor element to said first series of conductive traces;
- a plurality of conductive balls connected to said second series of conductive traces;
- and
- an encapsulant covering at least a portion of said semiconductor element and said insulating substrate.
5 more elements
A low profile ball grid array semiconductor package comprising:
- an insulating substrate having a top surface and a bottom surface, said insulating substrate having an aperture extending from said top surface to said bottom surface;
- a series of conductive traces located on said bottom surface of said insulating substrate;
- a thin sheet material thick secured to said top surface of said insulating substrate and covering said aperture such that a downward facing cavity is formed, said thin sheet material having a thickness of approximately 0.025 to 0.1 mm;
- a semiconductor element mounted in said downward facing cavity, said semiconductor element having a plurality of bond pads, each of said bond pads associated with an input or an output of said semiconductor element;
- a plurality of wire bonds connecting said bond pads of said semiconductor element to said series of conductive traces;
- a plurality of conductive balls connected to said series of conductive traces;
- and
- an encapsulant covering at least a portion of said semiconductor element and said insulating substrate.
5 more elements
An integrated circuit comprising:
- a plurality of low profile ball grid array semiconductor packages;
- and
- a plurality of leads connecting said plurality of ball grid array semiconductor packages together to form a complete circuit, said low profile ball grid array semiconductor packages further comprising a semiconductor element mounted in a cavity on a thin sheet material approximately 0.025 to 0.1 mm thick.
A device for mounting a semiconductor element comprising:
- an insulating substrate, said insulating substrate having a top surface and a bottom surface, with an aperture therein extending from said top surface to said bottom surface;
- a series of conductive traces located on said bottom surface of said insulating substrate;
- a plurality of conductive balls connected to said series of conductive traces;
- and
- a thin sheet material approximately 0.025 to 0.1 mm thick secured to said bottom surface of said insulating substrate and covering said aperture to form an upwards facing cavity,
- wherein said semiconductor element is mounted in said cavity.
3 more elements
A device for mounting a semiconductor element comprising:
- an insulating substrate, said insulating substrate having a top surface and a bottom surface, with an aperture therein extending from said top surface to said bottom surface;
- a series of conductive traces located on said bottom surface of said insulating substrate;
- a plurality of conductive balls connected to said series of conductive traces;
- and
- a thin sheet material approximately 0.025 to 0.1 mm thick secured to said top surface of said insulating substrate and covering said aperture to form a downwards facing cavity,
- wherein said semiconductor element is mounted in said downwards facing cavity.
3 more elements
A printed circuit board comprising:
- a plurality of low profile ball grid array semiconductor packages;
- and
- a plurality of leads connecting said plurality of ball grid array semiconductor packages together to form a complete circuit, said low profile ball grid array semiconductor packages further comprising a semiconductor element mounted in a cavity on a thin sheet material, said thin sheet material having a thickness of approximately 0.025 to 0.1 mm.
Dependencies are inferred from the claim text.