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US 6,163,862 AGranted
On-chip test circuit for evaluating an on-chip signal using an external test signal
AssigneeInternational Business Machines Corporation
InventorsR. Dean Adams, Edmond S. Cooley, Patrick R. Hansen
Life of this patent
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Abstract
An on-chip test circuit for evaluating on-chip signals for a semiconductor memory chip includes an on-chip signal associated with a memory circuit on the chip; said on-chip signal having a signal characteristic to be evaluated; an input circuit for receiving an off-chip test signal; and a test circuit that compares said on-chip signal and said test signal.
Claims20
A semiconductor chip comprising:
- an on-chip signal;
- said on-chip signal having an analog voltage to be evaluated;
- and a test circuit that receives an off-chip test signal having an analog voltage and detects the relative magnitude of said analog voltage of said on-chip signal and said analog voltage of said test signal to evaluate the voltage level of the on-chip signal.
A method for evaluating an on-chip signal having an analog voltage for a semiconductor chip, comprising the steps of:
- a) applying an externally generated test signal having an analog voltage to one input of a test circuit on the chip;
- b) applying the on-chip signal being evaluated to another input of the test circuit;
- c) detecting by said test circuit the relative magnitude of said on-chip signal analog voltage and the analog voltage of said test signal;
- and
- d) producing an output from the test circuit that indicates the greater magnitude of the analog voltage of the on-chip signal and the analog voltage of the test signal.
2 more elements
Dependencies are inferred from the claim text.