Method of fabricating semiconductor circuit devices utilizing multiple exposures

Abstract

In a semiconductor circuit device fabricating process in which a reduction image projection exposure apparatus and an electron beam exposure apparatus are in a mixed use in its exposure process, pattern position shift errors for each exposure apparatus are measured and corrected at the time of drawing by means of an electron beam drawing apparatus, thereby enhancing the alignment accuracy. First, a pattern for measuring position shifts is exposed using a stepper and the electron beam drawing apparatus. Then, the position shift errors are measured using an identical coordinate position measuring device. Accidental errors have been mixed in the measurement result at this time. On account of this, measurement data at a certain point are smoothed by taking a summation average with data on the periphery thereof, thus decreasing influences of the accidental errors. Moreover, by inverting positive or negative signs of the data on the position shift errors, the data are made into correction data. Then, the correction data are stored. When an exposure is performed by the electron beam drawing apparatus with the pattern exposed by the stepper as a reference, the correction data for the two apparatuses are transferred to the electron beam drawing apparatus, the two data are added to detected mark positions, and at positions after the addition, pattern position shifts within a wafer surface are determined. At the time of exposure, the exposure is performed at positions obtained by subtracting the correction data from the determined pattern position shifts. This method makes it possible to correct both position shift errors within the wafer surface due to the stepper and position shift errors due to the electron beam drawing apparatus, thus allowing the alignment accuracy to be enhanced. Also, this result makes it possible to enhance yield for products in the fabricating process.

Dependencies are inferred from the claim text.