Shared memory initialization method for system having multiple processor capability

A method for booting-up a computer system, wherein the method comprises:

• resetting a plurality of processors;
• determining a bootstrap processor from the plurality of processors, wherein any remaining processors are designated as application processors;
• the bootstrap processor instructing an application processor to test a plurality of memory locations in a shared memory module;
• the bootstrap processor performing POST tasks while the application processor tests the plurality of memory locations;
• and
• the bootstrap processor searching for an operating system to load into the shared memory module after the application processor finishes testing the plurality of memory locations.

A multiprocessor system which comprises:

• a shared memory module which requires initialization after system power-on;
• a plurality of processors coupled to the shared memory module to store and retrieve executable programs and data, wherein each of the plurality of processors is reset after system power-on and thereafter participates in an arbitration process to determine a bootstrap processor from the plurality of processors, and wherein any remaining processors from the plurality of processors are designated as application processors;
• and
• a nonvolatile memory coupled to the plurality of processors and configured to store a BIOS for retrieval by any of the processors, wherein the BIOS includes instructions for the bootstrap processor to direct an application processor to test a plurality of memory locations in the shared memory module,
• wherein the BIOS further includes instructions for the bootstrap processor to conduct one or more POST tasks while the application processor tests the plurality of memory locations.

A computer system which comprises:

• a volatile system memory having memory locations for temporarily storing data;
• at least two processors coupled to the system memory to read and write said data;
• a power switch;
• a power supply coupled to the power switch to detect operation of the power switch, and coupled to provide power to the system memory and the processors in response to operation of the power switch, wherein the power supply is configured to assert a reset signal for a predetermined time after an initial operation of the power switch,
• wherein the processors are configured to receive the reset signal and configured to enter arbitration in response to assertion of the reset signal to select one of the processors as a bootstrap processor and to identify remaining processors as application processors,
• wherein the bootstrap processor is further configured to instruct at least one application processor to test memory locations in the system memory module,
• wherein the bootstrap processor is further configured to initialize peripheral devices while the memory is being tested by at least one application processor.

A computer system which comprises:

• a shared memory module consisting of a base portion and a remaining portion, each having a plurality of memory locations;
• an application processor coupled to the shared memory module by a shared processor bus;
• and
• a bootstrap processor coupled to the memory module by the shared processor bus,
• wherein after the bootstrap processor tests the base portion of the shared memory module, the bootstrap processor instructs the application processor to test the remaining portion of the shared memory module,
• wherein the bootstrap processor is configured to perform a plurality of POST tasks while the application processor is testing the remaining portion of the shared memory module.