Semiconductor device using a chip scale package
AssigneeSharp Kabushiki Kaisha
InventorsKazuo Tamaki, Yasuyuki Saza, Yoshihisa Dotta
Life of this patent
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Abstract
A semiconductor device package which eliminates the possibility of damages to a solder connected portion of a flip-chip connected chip by load, or which eliminates ultrasonic output at the time of wire bonding is described. Electrodes of a first chip are connected to first connection pads corresponding to the electrodes with the first chip being bonded at its rear surface to a rear surface of a second chip. A first resin is interposed in a gap between the first chip and a circuit board so as not to cover the first or second connection pads. Thereafter, the electrode of the second chip is connected to the second connection pads by wires, and the whole device is overlayed by a second resin.
Claims20
A semiconductor device package, comprising:
- a plurality of first electrodes formed on a periphery of a first semiconductor device forming surface,
- a plurality of second electrodes formed on a periphery of a second semiconductor device forming surface;
- and
- a circuit board for mounting said semiconductor device thereon,
- said circuit board including
- a plurality of first connection pads, formed thereon each of which are connected to a corresponding one of said plurality of first electrodes by corresponding ones of a plurality of metal members,
- a plurality of second connection pads formed thereon, each of which are interconnected to a corresponding one of said plurality of second electrodes by corresponding ones of a plurality of metal wires,
- a first resin provided in a gap defined between said first semiconductor device forming surface and said circuit board and bounded by said plurality of metal members, wherein said first resin substantially fills said gap but does not contact said plurality of metal members, forming spaces therebetween;
- a second resin entirely covering said first and second semiconductor device forming surfaces so as to form the outer shape of the device package flush with ends of said circuit board, wherein said second resin fills said spaces formed between said first resin and said plurality of metal members.
A circuit board for manufacturing a semiconductor device package by mounting a semiconductor device having first and second device forming surfaces, comprising:
- a substrate having first and second surfaces and at least one through hole;
- first connection pads formed for connection with first electrodes which are formed at a peripheral portion of said first device forming surface and surround said through hole to form a region;
- second connection pads formed for connection with second electrodes which are formed at a peripheral portion of said second device forming surface;
- a first resin applied to that region which is surrounded by said first connection pads said first resin substantially filling said region but not contacting said first connection pads, forming spaces therebetween;
- and
- a second resin applied to said substrate for covering said first and second device surfaces.
A semiconductor device package, comprising
- a first semiconductor chip having a plurality of first electrodes formed thereon at a periphery;
- a second semiconductor chip connected to said first semiconductor chip;
- a circuit board for mounting said first and second semiconductor chips thereon, wherein said first semiconductor chip is mounted to said circuit board via a plurality of metal members so as to form a gap between a surface of said first chip and a surface of the circuit board;
- a first resin provided so as to substantially fill said gap while not contacting said plurality of metal members, thereby forming spaces therebetween;
- and
- a second resin overlaying said first and second semiconductor chips so as to form an outer shape of the semiconductor package device which is flush to ends of said circuit board, wherein said second resin fills said spaces formed between said first resin and said plurality of metal members.
Dependencies are inferred from the claim text.