Microcomputer enabling an erase/write program of a flash memory to interrupt by transferring interrupt vectors from a boot ROM to a RAM
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsNorihiko Fudeyasu, Nobusuke Abe
Life of this patent
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Abstract
A microcomputer including a boot ROM that stores a boot program for transferring from an outside source to a RAM an erase/write program for rewriting a flash ROM. A CPU transfers the boot program from the boot ROM to the RAM, and executes it in a boot mode, and relocates the entire interrupt vectors excluding a reset interrupt vector to the RAM in the boot mode, with the reset interrupt vector remaining in the boot ROM. This enables the erase/write program transferred to the RAM to execute interrupt processings which cannot be carried out in a conventional microcomputer.
Claims6
A microcomputer comprising:
- a RAM;
- a flash ROM that is rewritable, connected to said RAM;
- a boot ROM, connected to said RAM and said flash ROM for storing a plurality of interrupt vectors and for storing a boot program used for transferring an erase/write program for rewriting data of said flash ROM from a source outside said microcomputer via an input/output port to said RAM;
- and
- a CPU, connected to said RAM, said flash ROM, and said boot ROM, for operating in a boot mode for transferring the boot program from said boot ROM to said RAM, for executing said boot program stored in said RAM, and for transferring at least one of said plurality of interrupt vectors from said boot ROM to said RAM when executing said boot program stored in said RAM.
A microcomputer comprising:
- a RAM;
- a flash ROM that is rewritable, connected to said RAM;
- a boot ROM, connected to said RAM, said flash ROM, and said boot ROM, for storing a plurality of interrupt vectors and for storing a boot program used for transferring an erase/write program for rewriting data of said flash ROM from a source outside said microcomputer and an input/output port to said RAM;
- and
- a CPU, connected to said RAM, said flash ROM, and said boot ROM, for operating, in a boot mode for executing said boot program stored in said boot ROM to transfer said erase/write program from said source outside said microcomputer to said RAM, and after completing transfer of said erase/write program to said RAM, switching said boot mode to an erase/write mode in which said CPU executes said erase/write program on said RAM wherein said CPU transfers at least one of said plurality of interrupt vectors from said boot ROM to said RAM during execution of said erase/write program.
Dependencies are inferred from the claim text.