System and method of controlling access to privilege partitioned address space for a model specific register file

A method of controlling access to registers in an address space of a computer system, the method comprising:

• allocating registers to access regions of said address space, wherein each of said access regions is assigned a privilege level, and wherein said registers are model specific registers;
• receiving a privilege level input;
• receiving an address of a register, wherein said address identifies an access region to which said register is allocated;
• comparing said privilege level assigned to said access region identified by said address of said register to said privilege level input;
• and
• accessing said register if said privilege level assigned to said access region identified by said address of said register correlates to said privilege level input, wherein said register is a model specific register.

A computer system comprising:

• a microprocessor wherein said microprocessor includes:
• one or more registers wherein each of said one or more registers is assigned to one of a plurality of access regions and each of said plurality of access regions is assigned a privilege level;
• a validity check circuit configured to receive an address of a first register of said one or more registers, wherein said validity check circuit is configured to permit access to said first register if a privilege level input correlates to the privilege level assigned to the access region of that first register, wherein said registers are model specific registers;
• a bus bridge coupled to said microprocessor;
• a main memory coupled to said microprocessor;
• and
• an input/output device coupled to said bus bridge.