Cache device that reduces waiting time necessary for a given subsequent request to gain access to the cache

A cache device which writes a desired data into a general purpose register, said desired data designated by an instruction for accessing a main memory issued by a processing unit, said cache device comprising:

• a data buffer which holds block data containing said desired data transferred from said main memory when said desired data is found to be absent in a data array;
• a first bypass which circumvent said data buffer and through which said block data pass;
• a selector which selects either the data sent by said data buffer or the data sent through said first bypass;
• a second bypass which guides the data selected by said selector to the general purpose register;
• a first control means which writes said desired data into said general purpose register through the first and second bypasses;
• and
• a second control means which writes said block data held by said data buffer into a data array as soon as said data buffer holds the whole of said block data transferred from said main memory, and which inhibits execution of new instructions for access to said main memory while said block data are written into said data array.

A cache device connected between a processing unit and a main memory unit, said cache device comprising:

• a data buffer that holds block data which is transferred from said main memory unit and which includes target data indicated by an instruction when cache access by said instruction results in a cache miss, said instruction being issued by said processing unit and instructing to access said main memory;
• a selector connected to a first and a second bypass line and a target data bypass control circuit to deliver said target data to said processing unit when said target data is transferred from said main memory unit;
• and
• a data array write control circuit that controls writing of said block data, being held by said data buffer, into a data array when a whole content of said block data is accumulated in said data buffer, and that inhibits cache access by one or more new instructions while said block data, being held by said data buffer, are written into said data array.