Mathematical morphology processing method
AssigneeNippon Telegraph and Telephone Corporation
InventorsTakeshi Ikenaga, Takeshi Ogura
Life of this patent
Estimating the term…
Loading patent…
AssigneeNippon Telegraph and Telephone Corporation
InventorsTakeshi Ikenaga, Takeshi Ogura
Estimating the term…
A two-dimensional PE (processing element) array that can achieve a small amount of hardware, short transfer time and high flexibility. It includes q.times.r CAMs, where q and r are any integers equal to or greater than two, and hit-flag lines. Each CAM has one-dimensionally arrayed w words, a hit-flag register capable of shift up and shift down, and an upper shift I/O port and a lower shift I/O port for inputting from and outputting to outside the contents of the hit-flag register. Each of the hit-flag lines connects the lower-shift I/O port of one of two horizontally adjacent CAMs with the upper-shift I/O port of the other of the two. The w words are arranged in m rows and n columns and are connected in a zigzag, and each word is assigned to a PE that performs various types of logical and arithmetic operations.
A mathematical morphology processing method using a two-dimensional PE array comprising the steps of:
Dependencies are inferred from the claim text.