US 6,154,799 A · Repeater-switch for distributed arbitration digital data buses

Abstract

The technical field of the invention generally concerns digital computers and, in particular, repeaters or switches (40) for distributed arbitration digital data buses (52, 54, 56, and 58) to which devices (62, 64, 66, 68, 72 and 74) connect in parallel. The bus repeater/switch (40) includes a plurality of bus interface cards (48) that are connected to the distributed arbitration buses (52, 54, 56 and 58) for receiving signals from and transmitting signals to devices (62, 64, 66, 68, 72 and 74) connected thereto. The bus interface cards (48) connect to a control card (44) which allows signals from one of the sharing buses (52, 54 or 56) to be exchanged with the shared bus (58). The bus switch (40) also includes selector switch (84 or 88) for choosing which particular one of the sharing buses (52, 54 or 56) exchanges digital data signals with the shared bus (58). The bus switch (40) responds to signals on the distributed arbitration buses (52, 54, 56 and 58) and to phases of the protocol for those signals so that its presence between pairs of buses (52-58, 54-58 or 56-58) is imperceptible to devices (62, 64, 66, 68, 72 and 74) connected thereto.

Claims13

Dependent claims

A repeater for exchanging information between digital computing devices respectively connected in parallel to a shared distributed arbitration digital data bus or to a sharing distributed arbitration digital data bus, each distributed arbitration digital data bus respectively including signal lines upon which signals occur, said repeater interconnecting the shared and the sharing distributed arbitration digital data buses into a single, composite distributed arbitration digital data bus, said repeater comprising:

shared bus interface circuit, connected to the shared distributed arbitration digital data bus, for receiving signals from and transmitting signals to a device connected to the shared distributed arbitration digital data bus;
sharing bus interface circuit, connected to the sharing distributed arbitration digital data bus, for receiving signals from and transmitting signals to a device connected to the sharing distributed arbitration digital data bus;
and
control circuit, simultaneously connected both to said shared bus interface circuit and to said sharing bus interface circuit, said control circuit responding to a plurality of signals on the shared and sharing distributed arbitration digital data buses for controlling both of said bus interface circuits during an exchange of information between devices connected to the composite distributed arbitration digital data bus.

1 more element

A bus interface circuit adapted for use in a repeater for exchanging information between digital computing devices respectively connected in parallel to a shared distributed arbitration digital data bus or to a sharing distributed arbitration digital data bus, each distributed arbitration digital data bus respectively including signal lines upon which signals occur, said repeater interconnecting the shared and the sharing distributed arbitration digital data buses into a single, composite distributed arbitration digital data bus, said repeater including a control circuit adapted for connection respectively to the bus interface circuit for the shared and for the sharing distributed arbitration digital data buses, said control circuit responding to a plurality of signals on the shared and sharing distributed arbitration digital data buses for controlling the bus interface circuit during an exchange of information between devices connected to the composite distributed arbitration digital data bus, said bus interface circuit comprising:

means for connecting to the distributed arbitration digital data buses;
means for connecting to said control circuit;
and
means for exchanging signals between a device connected to at least one of the distributed arbitration digital data buses, and said control circuit.

1 more element

A repeater for exchanging information between an initiator digital computing device that connects in parallel to a first Small Computer System Interface ("SCSI") bus and a target digital computing device that connects in parallel to a second SCSI bus, each SCSI bus respectively including signal lines via which the initiator and target digital computing device exchange signals, said repeater interconnecting the first and the second SCSI buses into a single, composite SCSI bus, said repeater comprising:

first SCSI bus interface circuit, connected to the first SCSI bus, for receiving signals from and transmitting signals to the initiator digital computing device;
second SCSI bus interface circuit, connected to the second SCSI bus, for receiving signals from and transmitting signals to the target digital computing device;
and
control circuit, simultaneously coupled both to said first SCSI bus interface circuit and to said second SCSI bus interface circuit, for controlling said first and second SCSI bus interface circuits during a sequence of SCSI bus phases that commences when the initiator digital computing device, during a BUS FREE phase of the SCSI bus protocol, initiates an ARBITRATION phase of the SCSI protocol;
during the sequence of SCSI bus phases commenced by the initiator digital computing device the control circuit controlling the signal present on at least one signal line of either the first or second SCSI buses responsive to a signal present on a different signal line of either the first or second SCSI buses;
and the sequence of SCSI bus phases ending whenever a BUS FREE phase of the SCSI bus protocol occurs.

3 more elements

Dependencies are inferred from the claim text.

Repeater-switch for distributed arbitration digital data buses

Life of this patent

Repeater-switch for distributed arbitration digital data buses

Life of this patent

Abstract

Claims13