Self-refresh oscillator

Abstract

A self-refresh oscillator for a semiconductor memory device includes a control signal generater sensing a variation of a potential of an inputted signal and generating a write operation control signal having a predetermined pulse width in accordance with an enable signal enabled when a self-refresh mode starts, a cell emulator feeding back the write operation control signal, performing a data write operation, and discharging an output terminal potential in accordance with a temperature variation, and a comparator selectively enabled according to the enable signal, comparing a first input signal which is an output signal from the cell emulator with a second input signal which is a reference potential, and inputting the output signal to a first input terminal of the control signal generater. As a result, the self-refresh oscillator senses the data loss of the memory cell resulting from the leakage current, and controls a refresh period, thereby minimizing the power consumption in the standby mode.

Dependencies are inferred from the claim text.