Automated method of burn-in and endurance testing for embedded EEPROM
AssigneeLucent Technologies Inc.
InventorsRobert H. Arnold, Richard D. Bell, Ross A. Kohler, Richard J. McPartland, Paul K. Wheeler
Life of this patent
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AssigneeLucent Technologies Inc.
InventorsRobert H. Arnold, Richard D. Bell, Ross A. Kohler, Richard J. McPartland, Paul K. Wheeler
Estimating the term…
An on-chip processor is used as a controller for burn-in and endurance testing of embedded non-volatile memory. An automated test machine downloads a test program into the non-volatile memory. The downloaded program contains a test program to be run on the non-volatile memory. When the burn-in or endurance test equipment activates the processor, the processor executes the program and performs a test on the non-volatile memory. The same method can be utilized to perform either the burn-in or endurance tests. Only the clock and reset lines are required to operate the test. Since the clock and reset lines are part of the processor's standard inputs, the method performs burn-in and endurance testing of an embedded non-volatile memory without bringing out the memory's address, data and control lines to the package pins of the integrated circuit. Since the clock and reset lines are part of the standard burn-in and endurance test equipment, the method also performs the testing without the use of expensive burn-in or endurance test equipment.
A method of testing an integrated circuit having a memory array, said circuit including a processor communicating with said memory array, the method comprising the steps of:
A method of producing a test system for testing an integrated circuit comprising:
A system for testing an integrated circuit having an embedded memory on a processor, said system comprising:
Dependencies are inferred from the claim text.