Processor with embedded in-circuit programming structures

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first memory array;
• a second memory array on the integrated circuit;
• an external port on the integrated circuit by which data is received from an external source;
• and
• control logic, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data from the external port;
• wherein the first memory array comprises a plurality of separately erasable blocks of non-volatile memory cells, and the in-circuit programming set is stored in a particular block in the plurality of blocks, and wherein during execution of the in-circuit programming set, the particular block is modified to generate a new in-circuit programming set, and then the control logic causes the processor to execute the new in-circuit programming set from the first memory array.

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first memory array;
• a second memory array on the integrated circuit;
• an external port on the integrated circuit by which data is received from an external source;
• and
• control logic, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data from the external port;
• wherein the first memory array and the second memory array comprise flash erasable and programmable read only memory.

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first memory array;
• a second memory array on the integrated circuit;
• an external port on the integrated circuit by which data is received from an external source;
• and
• control logic, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data from the external port;
• including a plurality of ports to external set data sources, and wherein the port in the plurality of ports used for the external port during execution of the in-circuit programming set is determined by an instruction or instructions in the in-circuit programming set.

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first memory array;
• a second memory array on the integrated circuit;
• an external port on the integrated circuit by which data is received from an external source;
• and
• control logic, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data from the external port;
• and including
• a plurality of ports to external data sources, and wherein the in-circuit program update command is received at one of the plurality of ports.

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first memory array;
• a second memory array on the integrated circuit;
• an external port on the integrated circuit by which data is received from an external source;
• and
• control logic, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data from the external port;
• wherein the non-volatile memory cells in the first memory array comprise floating gate memory cells, and the second memory array comprises floating gate memory cells, and including:
• an erase and program port coupled to the first and second memory arrays, which provides for erasing and programming the first and second memory arrays.

A controller on an integrated circuit, comprising:

• a processor on the integrated circuit, having an instruction input, which executes instructions received at the instruction input;
• a first memory array comprising non-volatile memory cells on the integrated circuit having a read port coupled to the instruction input of the processor, and including a block of non-volatile memory cells storing an in-circuit programming set of instructions;
• a second memory array comprising non-volatile memory cells on the integrated circuit having a read port coupled to the instruction input of the processor;
• an external port on the integrated circuit by which data is received from an external source;
• control logic, on the integrated circuit, responsive to an in-circuit program update command, to write a copy of the in-circuit programming set from the first memory array to the second memory array, and to cause the processor to execute the in-circuit programming set from the second memory array to program non-volatile memory cells of the first memory array with data received at the external port;
• and
• data paths, on the integrated circuit, for programming and verifying the first memory array independent of the in-circuit programming set.

A method for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• providing on the integrated circuit a first erasable and programmable read only memory array and a second erasable and programmable read only memory array;
• storing an in-circuit programming set of instructions in the first array;
• receiving an in-circuit program command from an initiator external to the integrated circuit;
• in response to the in-circuit program command, copying the in-circuit programming set from the first array to the second array, and executing with the processor the in-circuit programming set from the second array;
• programming at least a selected portion of the first array with data from an external source under control of the in-circuit programming set;
• and
• after programming the portion of the first array, executing with the processor the in-circuit programming set from the first array.

An apparatus for in-circuit programming of an integrated circuit having a processor which executes a program of instruction, comprising:

• a first memory array comprising non-volatile memory cells on the integrated circuit which stores instructions for execution by the processor, including an in-circuit programming set of instructions for programming the first and a second memory array;
• the second memory array comprising non-volatile memory cells on the integrated circuit which stores instruction for execution by the processor;
• a code multiplexer having a first input coupled to the first memory array, a second input coupled to the second memory array, and an output to feed the processor with instructions;
• an erase/program multiplexer which supports a first erase/program path for programming and erasing at least the first memory array to load at least the first memory array with instructions, and a second erase/program path for programming and erasing at least the first memory array under control of the in-circuit programming set of instructions;
• an external port on the integrated circuit by which messages are exchanged between the integrated circuit and an external source;
• and
• logic including the in-circuit programming set of instructions stored in the first memory array and the processor, responsive to an in-circuit program update command to update all or part of the instructions stored in the first memory array and in the second memory array.

A method for in-circuit programming of an integrated circuit having a processor which executes a program of instructions, comprising:

• providing on the integrated circuit a first erasable and programmable read only memory array and a second erasable and programmable read only memory array;
• storing an in-circuit programming set of instructions in the first array;
• receiving an in-circuit program command and an identifier from an initiator external to the integrated circuit;
• verifying the identifier of the initiator, and if verified then in response to the in-circuit program command, copying the in-circuit programming set from the first array to the second array, and executing with the processor the in-circuit programming set from the second array;
• and
• programming at least a selected portion of the first array with an instruction set from an external source under control of the in-circuit programming set.