Safe general purpose virtual machine computing system

A method comprising:

• defining a safe general purpose virtual machine having a general purpose memory protection model that does not rely or depend upon a specific hardware architecture or programming language feature for memory protection, at least one memory access permission based on said memory protection model, a bytecode reduced instruction set computer compiler wherein said bytecode reduced instructions occur only on byte boundaries, and a plurality of reduced instruction set computer virtual machine instructions selected from at least one of a group of types comprised of:
• control transfer instructions, arithmetic instructions, bitwise manipulation instructions, register/memory instructions, and miscellaneous instructions;
• generating, on a first computer, a safe virtual machine program from a source program that contains at least one unsafe instruction, wherein said safe virtual machine program is hardware architecture independent and programming language independent;
• optionally compressing said safe virtual machine program pursuant to a bytecode reduced instruction set computer compression system;
• transferring said safe virtual machine program from said first computer to said second computer;
• and
• executing said safe virtual machine program within a memory space defined by said memory protection model and said at least one memory access permission on a second computer that is independent from and network accessible to said first computer, and said first computer is hardware architecturally distinguishable from said second computer.

A system for executing a safe virtual machine program in a safe general purpose virtual machine, said system comprising:

• a first computer communicatively connected to a second computer, said first computer being operationally independent from said second computer;
• means for defining a safe general purpose virtual machine having a general purpose memory protection model that does not rely or depend upon a specific hardware architecture or programming language feature for memory protection, at least one memory access permission based on said memory protection model, a bytecode reduced instruction set computer compiler wherein said bytecode reduced instructions occur only on byte boundaries, and a plurality of reduced instruction set computer virtual machine instructions selected from at least one of a group of types comprised of:
• control transfer instructions, arithmetic instructions, bitwise manipulation instructions, register/memory instructions, and miscellaneous instructions;
• means for generating, on said first computer, a safe virtual machine program from a source program that contains at least one unsafe instruction, wherein said safe virtual machine program is hardware architecture independent and programming language independent;
• means for optionally compressing said safe virtual machine program pursuant to a bytecode reduced instruction set computer compression system;
• means for transferring said safe virtual machine program from said first computer to said second computer;
• and
• means for executing said safe virtual machine program within a memory space defined by said memory protection model and said at least one memory access permission on said second computer.

A computer readable medium containing computer executable instructions to perform a method for implementing a safe general purpose virtual machine, said method comprising:

• defining said safe general purpose virtual machine having a general purpose memory protection model, at least one memory access permission based on said memory protection model, a bytecode reduced instruction set computer compiler, and a plurality of reduced instruction set computer virtual machine instructions comprising:
• non-trap type control instructions that operate only in user mode and do not invoke a privileged or supervisory mode, arithmetic instructions, bitwise manipulation instructions, register/memory instructions that include one or more load and store instructions that are enhanced to allow a variety of higher level addressing modes to facilitate generating efficient code of a variety of hardware target platforms, and miscellaneous instructions that include a no-operation instruction, one or more instructions that return specific hardware environment information, and one or more register-to-memory location link and release instructions;
• generating a safe virtual machine program from a source program that contains at least one unsafe instruction, wherein said safe virtual machine program is hardware architecture independent and programming language independent;
• optionally compressing said safe virtual machine program pursuant to a bytecode reduced instruction set computer compression system;
• and
• executing said safe virtual machine program within a memory space defined by said memory protection model and said at least one memory access permission.

A method for compressing a safe virtual machine program, which is hardware architecture independent and programming language independent, said method comprising:

• generating a list of repeated instruction patterns in said safe virtual machine program to add to an instruction dictionary;
• estimating a program size reduction P to said safe virtual machine program based on a record of said list of repeated instruction patterns in said instruction dictionary;
• identifying a number of bytes W required to represent said list of repeated instruction patterns in said instruction dictionary;
• determining a compression benefit B based on a weighted evaluation of P and W;
• and
• implementing a dense randomly accessible stream of bytecodes using a bytecode reduced instruction set computer compression on said safe virtual machine program in positive response to said step of determining, wherein said bytecode reduced instructions occur only on byte boundaries.

A method for compressing a safe virtual machine program, which is hardware architecture independent and programming language independent, said method comprising:

• generating operand specialization compression on repeated instruction operands within said safe virtual machine program including:
• adding commonly repeated instructions to a repeated instruction dictionary;
• and implicitly representing repeated operands from among said commonly repeated instructions in said repeated instruction dictionary;
• generating opcode combination compression on repeated instruction patterns within said safe virtual machine program, including:
• adding repeated pairs of adjacent instruction combinations to a repeated instruction dictionary;
• generating a single meta-instruction for each unique one of repeated pairs of adjacent instruction combinations;
• and
• combining pairs of zero-field and one-field instructions to maximize optimal byte boundaries of densely packed instructions.