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US 6,151,412 AGranted
Image processing apparatus having capability of synthesizing contents of plural memories
AssigneeCanon Kabushiki Kaisha
InventorMasahiko Enari
Life of this patent
Estimating the term…
Abstract
An image processing apparatus has plural memories each capable of storing image data of a picture frame, and combines the image data of the plural memories. A data bus transmits the output resulting from the combining, to the input of the plural memories.
Claims14
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to each of said plural memories and to an input of said process means;
- a second bi-directional data bus connected to an output of said process means and each of said plural memories;
- output means, connected to said second bi-directional data bus, for outputting image data to display means for displaying an image;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input said process means via said first bi-directional data bus, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said second bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via said first bi-directional data bus.
4 more elements
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to each of said plural memories and to an input of said process means;
- a second bi-directional data bus connected to an output of said process means and each of said plural memories;
- output means, connected to said second bi-directional data bus, for outputting image data to recording means for recording an image;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input said process means via said second bi-directional data bus, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said second bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via said first bi-directional data bus.
4 more elements
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to an input of said process means and each of said plural memories;
- a second bi-directional data bus connected to an output of said process means and each of said plural memories;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input of said process means via said first bi-directional data bus, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said second bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via said first bi-directional data bus.
3 more elements
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to each of said plural memories and to an input of said process means;
- a second bi-directional data bus connected to each of said plural memories and to the input of said process means;
- a third bi-directional data bus connected to each of said plural memories and to an output of said process means;
- output means connected to said third bi-directional data bus for outputting image data to display means for displaying an image;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input of said process means via one of said first and second bi-directional data buses, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said third bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via one of said first and second bi-directional data buses.
5 more elements
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to each of said plural memories and to an input of said process means;
- a second bi-directional data bus connected to each of said plural memories and to the input of said process means;
- a third bi-directional data bus connected to each of said plural memories and to an output of said process means;
- output means connected to said third bi-directional data bus for outputting image data to recording means for recording an image;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input said process means via one of said first and second bi-directional data buses, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said third bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via one of said first and second bi-directional data buses.
5 more elements
An image processing apparatus comprising:
- plural memories each having a capacity for storing image data of a picture frame;
- process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;
- a first bi-directional data bus connected to each of said plural memories and to an input of said process means;
- a second bi-directional data bus connected to each of said plural memories and to the input of said process means;
- a third bi-directional data bus connected to each of said plural memories and to an output of said process means;
- and
- control means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to said process means via one of said first and second bi-directional data buses, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said third bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via one of said first and second bi-directional data buses.
4 more elements
Dependencies are inferred from the claim text.