Clock matching apparatus for a data reproduction system
AssigneeFujitsu Limited
InventorsKenichi Hamada, Satoshi Furuta, Masakazu Taguchi, Toru Fujiwara
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AssigneeFujitsu Limited
InventorsKenichi Hamada, Satoshi Furuta, Masakazu Taguchi, Toru Fujiwara
Estimating the term…
A clock matching apparatus for a data reproduction system includes a phase error detection unit which detects a phase error of a clock signal based on samples of a readout signal output by a sampler of the data reconstruction system. A phase-locked loop supplies a phase-matched clock signal to the sampler by compensating for the phase error detected by the phase error detection unit. The phase error detection unit includes an edge detection unit which detects a sampling instant for an edge sample among the samples of the readout signal. A difference unit generates a difference in timing phase between the edge sample and a sync level, the sync level being a reference signal level corresponding to a level of the readout signal at the sampling instants thereof and defined based on a partial-response waveform, the difference in the timing phase being output to the phase-locked loop as the detected phase error.
A clock matching apparatus which supplies a clock signal to a sampler of a data reproduction system so that a readout signal obtained from a storage medium is sampled periodically at sampling instants synchronized with the clock signal, in order to recover written information in the data reproduction system, including:
Dependencies are inferred from the claim text.