Programmable logic device with multi-port memory
AssigneesQuickturn Design Systems, Inc., Altera Corporation
InventorsStephen P. Sample, Michael R. Butts, Kevin A. Norman, Rakesh H. Patel, Chao Chiang Chen
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AssigneesQuickturn Design Systems, Inc., Altera Corporation
InventorsStephen P. Sample, Michael R. Butts, Kevin A. Norman, Rakesh H. Patel, Chao Chiang Chen
Estimating the term…
An integrated circuit for implementing reconfigurable logic, such as a field programmable gate array ("FPGA"), as described herein has multiple blocks of multi-ported memory. The memory has a plurality of read ports and a plurality of write ports. Each port of the multi-ported memory can be configured with a width and depth that is independent and separate from the width and depth of the other ports. The memory also includes a port for taking a synchronous snapshot of the contents of the memory or for loading the memory to an initial state. The memory shares routing lines used by a low level logic element thereby alleviating the need to add routing lines to an interconnect network just to satisfy the memory requirements.
An integrated circuit comprising:
An integrated circuit comprising:
An integrated circuit comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.