Apparatus for receiving/transmitting signals in an input/output pad buffer cell
AssigneeIntel Corporation
InventorsSmith E. Jeffrey, Timothy W. Kelly, Stephen W. Kiss, Keith M. Self
Life of this patent
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AssigneeIntel Corporation
InventorsSmith E. Jeffrey, Timothy W. Kelly, Stephen W. Kiss, Keith M. Self
Estimating the term…
An electronic circuit die is presented including a plurality of first and second input/output (I/O) pad buffer cells. The first I/O pad buffer cells include at least a latch for latching data signals received at a pad in the cell. Adjacent ones of these first I/O pad buffer cells are conductively coupled together using conductive trace pins. The second I/O pad buffer cells include a pad that receives clocking signal which are supplied to the latches of the first I/O pad buffer cells. Accordingly, data signals received at the pads of the die are latched in the pad as opposed to the core logic of the die. One benefit of providing the latching of data signals in the pad is that conductive traces between the latches and the core logic need not be precisely matched, thus reducing cost. Also, the first I/O pad buffer cells can be similarly constructed, thus reducing the complexity and cost of manufacture for the die.
An electronic circuit die comprising:
An electronic circuit die comprising:
An apparatus for transferring data signals between two components comprising:
An apparatus for transferring data signals among at least three components comprising:
A method of transferring a data signal relative to an electronic circuit die comprising:
Dependencies are inferred from the claim text.