Back to results
US 6,151,243 AGranted
Ferroelectric memory device having folded bit line architecture
AssigneeHyundai Electronics Industries Co., Ltd.
InventorJae Whan Kim
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory device includes a plurality of groups of active areas, each active area having two memory cells, and a plurality of pairs of conductive lines arranged in a parallel fashion, each conductive line having a word line and a plate line, wherein a pair of the word line and the plate line are isolated through an insulating layer, wherein each group of the active areas are coupled to each pair of the conductive lines, thereby having a folded bit line architecture without increasing a chip size.
Claims10
A ferroelectric memory device, comprising:
- a plurality of groups of active areas, each active area having two memory cells;
- and
- a plurality of pairs of a word line and a plate line arranged in a parallel fashion, wherein the word line and the plate line are isolated through an insulating layer,
- wherein each group of the active areas is respectively coupled to two pairs of the word and the plate lines, and each of memory cells of each active areas contained in the group is respectively coupled to each of said two pairs of the word and plate lines.
1 more element
Dependencies are inferred from the claim text.