Error estimation circuit and method using an analog-to-digital converter
AssigneeTexas Instruments Incorporated
InventorKerry C. Glover
Life of this patent
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Abstract
A read channel (18) is provided for use in a mass storage system. The read channel (18) includes a plurality of circuit modules and an error estimation circuit (50). The plurality of circuit modules receive an analog data signal from a disk/head assembly (12) and condition the signal to provide a digital data signal. The error estimation circuit (50) receives an analog signal from one of the plurality of circuit modules and analyzes the analog signal. The error estimation circuit (50) provides digital error signal (94) and digital level estimation signal (96) as a result.
Claims16
A read channel for use in a mass storage system comprising:
- a plurality of circuit modules including an equalizer operable to receive and process an analog data signal, the plurality of circuit modules operable to generate a digital data signal in response therefrom;
- and
- an error estimation circuit operable to receive and process an equalized signal corresponding to a processed analog data signal from said equalizer, the error estimation circuit operable to provide a digital error signal based on a difference between said equalized signal and a target signal, said target signal provided digital level voltage estimation signal, wherein the digital error signal and the digital level voltage estimation signal are input to said plurality of circuit modules.
A read channel for use in a mass storage system comprising:
- an automatic gain control circuit having a variable gain amplifier, the automatic gain control circuit operable to receive a digital error signal and a digital level voltage estimation signal, the automatic gain control circuit operable to generate a gain signal from the digital error signal and the digital level voltage estimation signal, the variable gain amplifier operable to receive an analog data signal and to amplify the analog data signal according to the gain signal to generate an amplified analog data signal;
- a filter circuit operable to receive, filter, and equalize the amplified analog data signal, the filter circuit operable to generate a filtered/equalized data signal having discrete values in response;
- an error estimation circuit operable to receive and process the filtered/equalized data signal from the filter circuit, the error estimation circuit operable to provide a digital error signal based on a difference between the filtered/equalized data signal and a target signal, said target signal provided digital level voltage estimation signal and
- a detector operable to receive the digital error signal and the digital level voltage estimation signal and to provide a corresponding digital data signal to the automatic gain control circuitry.
Dependencies are inferred from the claim text.