Amplifier circuit with amplitude and phase correction and method of operation
AssigneeMotorola, Inc.
InventorsDavid K. Lovelace, Danielle L. Coffing, Jeffery C. Durec
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Abstract
A correction circuit (10) includes a transistor (30) that generates a feedback signal for equalizing the amplitude and adjusting the phase of the output signals (V.sub.OUT- and V.sub.OUT+) that are provided at the output of the variable gain amplifier (10). The base terminal of the transistor (30) receives a summed value of the output signals (V.sub.OUT- and V.sub.OUT+). The summed value is inverted and fed back to the differential transistors (12 and 14) and combined with the output signals (V.sub.OUT- and V.sub.OUT+). The output signals (V.sub.OUT- and V.sub.OUT+) have a proper amplitude and phase relationship when the summed value is substantially zero.
Claims11
An amplifier circuit, comprising:
- a differential transistor pair that provides first and second output signals;
- a first load having a first terminal coupled for receiving the first output signal;
- a second load having a first terminal coupled for receiving the second output signal;
- a feedback transistor having a control terminal coupled to second terminals of the first and second loads and a first conduction terminal coupled to a first power conductor;
- a signal-inverting transistor having a control terminal coupled to a second conduction terminal of the feedback transistor, a first conduction terminal coupled to a second power conductor, and a second conduction terminal coupled to commonly coupled terminals of the differential transistor pair;
- a first current source having a first terminal coupled to the second conduction terminal of the feedback transistor and a second terminal coupled to the second power conductor;
- and
- a second current source having a first terminal coupled to the first conduction terminal of the signal-inverting transistor and a second terminal coupled to the second power conductor.
An amplifier circuit having a differential transistor pair with commonly coupled first conduction terminals and second conduction terminals that provide a differential output signal, comprising:
- serially connected loads coupled between the second conduction terminals of the differential transistor pair and providing a summed value of the differential output signals;
- a feedback transistor having a control terminal coupled for receiving the summed value and a first conduction terminal coupled to a first power conductor;
- a signal-inverting transistor having a control terminal coupled to a second conduction terminal of the feedback transistor, a first conduction terminal coupled to a second power conductor, and a second conduction terminal coupled to the commonly coupled first conduction terminals of the differential transistor pair;
- a first current source having a first terminal coupled to the second conduction terminal of the feedback transistor and a second terminal coupled to the second power conductor;
- and
- a second current source having a first terminal coupled to the first conduction terminal of the signal-inverting transistor and a second terminal coupled to the second power conductor.
Dependencies are inferred from the claim text.