Time delay circuit which is voltage independent
OwnerRandy L. Yach, Kent Hewitt +1inventors
InventorsRandy L. Yach, Kent Hewitt, David M. Susak
Life of this patent
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Abstract
A time delay circuit that produces a constant delay and is independent of supply voltage. The time delay circuit has a current mirror circuit, a voltage shift circuit, an inverter and a capacitor. The inverter will trip at a predetermined voltage level. A capacitor is coupled to the current mirror circuit and to the inverter for generating a portion of the delay time. A voltage shift circuit is coupled to the inverter for approximately mirroring a voltage shift in the current mirror circuit thereby allowing the time delay circuit to be voltage independent.
Claims12
A voltage independent time delay circuit comprising:
- a current mirror circuit having an output and being coupled to a voltage source;
- a first inverter circuit constructed and designed to trip at a predetermined voltage level, the first inverter having an input coupled to the output of the current mirror circuit;
- a voltage shift circuit comprising a transistor coupled to the voltage source and a diode connected transistor coupled to the transistor and to the first inverter, wherein the voltage shift circuit is coupled to the current mirror circuit and to the first inverter for approximately mirroring a voltage shift in the current mirror circuit to the first inverter;
- and
- a capacitor coupled to the output of the current mirror circuit and to the input of the first inverter.
Dependencies are inferred from the claim text.